AMC proposes 1980s computer TV series

"Set in the early 1980s, Halt & Catch Fire dramatizes the personal
computing boom through the eyes of a visionary, an engineer and a
prodigy whose innovations directly confront the corporate behemoths of
the time. Their personal and professional partnership will be
challenged by greed and ego while charting the changing culture in
Texas' Silicon Prairie"
I don't think much of the concept. To me, the real drama was
developing the original computers, where the pioneers had no
precedents to guide them. PCs were merely the minaturization of
existing electronic components, an ongoing process.

The "Halt & Catch Fire" term originated when Gerry Wheeler
fully mapped out the Motorola 6800 implemented instruction set
and discovered some very useful but undocumented instructions.
Two of the not so useful instructions were instructions that started
an endless increment of the address bus of the processor he
referred these instructions as HCF meaning "Halt and Catch Fire"
in a Byte article he wrote.

At the time Gerry wrote the article embedded computing and
personal computing were intertwined. Gerry owned a
South West Tech 6800 based computer which at the time
was his personal computer.

Gerry Wheeler passed away 6 or 7 years ago.

Walter Banks

Rich Alderson

2012-11-30 23:13:04 UTC

Post by Walter Banks
The "Halt & Catch Fire" term originated when Gerry Wheeler
fully mapped out the Motorola 6800 implemented instruction set

I was familiar with HCF on joke instruction mnemonic lists before the first
microprocessor was invented.

--
Rich Alderson ***@alderson.users.panix.com
the russet leaves of an autumn oak/inspire once again the failed poet/
to take up his pen/and essay to place his meagre words upon the page...

Charlie Gibbs

2012-12-01 02:41:01 UTC

Post by Walter Banks
The "Halt & Catch Fire" term originated when Gerry Wheeler
fully mapped out the Motorola 6800 implemented instruction set

I was familiar with HCF on joke instruction mnemonic lists before
the first microprocessor was invented.

<aol>
Me too.
</aol>

I think I first saw it as part of that list of opcodes for the
mythical 360 model 69, along with things like Rewind and Break
Tape, Execute Operator, etc. For some reason, the one that
gave me the giggles was Reverse Drum Immediate, probably because
I could visualize a big electric motor groaning under the strain
of doing just that.

--
/~\ ***@kltpzyxm.invalid (Charlie Gibbs)
\ / I'm really at ac.dekanfrus if you read it the right way.
X Top-posted messages will probably be ignored. See RFC1855.
/ \ HTML will DEFINITELY be ignored. Join the ASCII ribbon campaign!

Joe Morris

2012-12-01 04:25:22 UTC

Post by Walter Banks
The "Halt & Catch Fire" term originated when Gerry Wheeler
fully mapped out the Motorola 6800 implemented instruction set

I was familiar with HCF on joke instruction mnemonic lists before
the first microprocessor was invented.

<aol>
Me too.
</aol>
I think I first saw it as part of that list of opcodes for the
mythical 360 model 69, along with things like Rewind and Break
Tape, Execute Operator, etc. For some reason, the one that
gave me the giggles was Reverse Drum Immediate, probably because
I could visualize a big electric motor groaning under the strain
of doing just that.

Nuts...now you've got me trying to figure out where to find my old copy of
what's probably the same list you're quoting from. A few of the other
instructions I can dig out of archived memory...

Read while Writing While Ripping Tape
Rewind punch
Read Invalid Data
Sort on Random Field

Joe

brian

2012-12-03 02:48:31 UTC

Post by Charlie Gibbs
I think I first saw it as part of that list of opcodes for the
mythical 360 model 69, along with things like Rewind and Break
Tape, Execute Operator, etc. For some reason, the one that
gave me the giggles was Reverse Drum Immediate, probably because
I could visualize a big electric motor groaning under the strain
of doing just that.

Reminds me of a friend in London who, for an O'Reilly event, built "Pimp
my Pong" It was an old Pong video game machine, clad in leather, with an
attached whip, which punished losers. Dumping current when the big whip
motor reversed was an major issue.

He said that watching Executives from MS and similar organisations
voluntarily suffering corporal punishment was very rewarding.

--brian

--
Wellington, New Zealand

Peter Flass

2012-12-01 12:56:20 UTC

Post by Walter Banks
The "Halt & Catch Fire" term originated when Gerry Wheeler
fully mapped out the Motorola 6800 implemented instruction set

I was familiar with HCF on joke instruction mnemonic lists before the first
microprocessor was invented.

I think it was a joke about an old "mainframe" so called, where bad
things might actually happen if you did something wrong. For some
reason I seem to remember it applied to a Univac 9xxx, but this may be
just due to my low opinion of low-end Univac machines.

--
Pete

Shmuel (Seymour J.) Metz

2012-12-02 01:11:16 UTC

Post by Peter Flass
I think it was a joke about an old "mainframe" so called, where bad
things might actually happen if you did something wrong. For some
reason I seem to remember it applied to a Univac 9xxx, but this may
be just due to my low opinion of low-end Univac machines.

If the 9xxx series is low end, what would you call the SS80, SS90 and
1005?

BTW, the IBM 650 would get a machine check on certain undefined
opcodes.

--
Shmuel (Seymour J.) Metz, SysProg and JOAT <http://patriot.net/~shmuel>

Unsolicited bulk E-mail subject to legal action. I reserve the
right to publicly post or ridicule any abusive E-mail. Reply to
domain Patriot dot net user shmuel+news to contact me. Do not
reply to ***@library.lspace.org

Peter Flass

2012-12-02 14:55:26 UTC

If the 9xxx series is low end, what would you call the SS80, SS90 and
1005?
BTW, the IBM 650 would get a machine check on certain undefined
opcodes.

As it should.

--
Pete

Shmuel (Seymour J.) Metz

2012-12-02 20:57:07 UTC

Post by Peter Flass

Post by Shmuel (Seymour J.) Metz
BTW, the IBM 650 would get a machine check on certain undefined
opcodes.

As it should.

It only got a machine check on some; others behaved as NOOP.

Charles Richmond

2012-12-03 12:46:02 UTC

If the 9xxx series is low end, what would you call the SS80, SS90 and
1005?
BTW, the IBM 650 would get a machine check on certain undefined
opcodes.

So a "machine check" would be like the "engine light" turning on... on your
car's dashboard??? It could indicate a tremendous number of different
conditions, right???

--

numerist at aquaporin4 dot com

Charlie Gibbs

2012-12-03 16:26:00 UTC

It depends on your definition of "bad things". The machines wouldn't
catch fire or anything. But their error checking was quite skimpy;
pretty much nothing short of an addressing exception or division by
zero would cause a program exception (9400) or red-light the processor
(9200/9300). Invalid opcodes were usually treated as no-ops, and
invalid digits or signs in packed decimal fields were treated as some
sort of valid value (a sign of binary zero was taken as positive, and
I think F in a decimal digit position was treated as 8).

I once wrote a little program for the 9300 that would just run the
card reader at full speed. But while waiting for the reader to
come ready, instead of spinning in a tight little TIO/BC loop,
I filled memory with binary zeros and fell through it. Since
the 9300's normal front-panel display was the first two bytes
of the currently-executing instruction, this caused all the
lights to go out, which normally could never happen while a
program was running. I called it "Read Cards in the Dark."

A lot of the time I spent converting customers from 9200/9300/9400
to 90/30 was tightening up data validity checking. They were
pretty upset at all the data checks their applications started
throwing, and intially accused us of errors in our conversions.
It was pretty scary to see the garbage that had lain undetected -
sometimes for years - in some of their master files.

This also led to some unforgivably sloppy programming practices.
I converted one programm that cleared a large array of packed
decimal accumulators by doing an XC on itself. All digit positions
went to zero, but so did the signs - but since the 9x00 simply
treated a zero sign as positive and wrote back a proper hex 0c
after the first operation on the field, they got away with it.

Post by Shmuel (Seymour J.) Metz
If the 9xxx series is low end, what would you call the SS80, SS90
and 1005?
BTW, the IBM 650 would get a machine check on certain undefined
opcodes.

So a "machine check" would be like the "engine light" turning on...
on your car's dashboard??? It could indicate a tremendous number of
different conditions, right???

Yes, but the machine check light indicated serious faults that
prevented the processor from continuing at all - usually hardware
failures. It wasn't like the "check engine" light on your car,
which half the time comes on for no reason other than the dealer
thinks it's time for you to come in and give them more money.

h***@bbs.cpcn.com

2012-12-03 18:33:27 UTC

Post by Charlie Gibbs
A lot of the time I spent converting customers from 9200/9300/9400
to 90/30 was tightening up data validity checking. They were
pretty upset at all the data checks their applications started
throwing, and intially accused us of errors in our conversions.
It was pretty scary to see the garbage that had lain undetected -
sometimes for years - in some of their master files.

Years ago, we did a coversion of a series of RPG programs to the
90/30. "Fun" experience since we didn't know RPG nor the 90/30 (nor
knew of the assignment when we were hired). We just tried to get the
programs running ASAP without any extra modifications.

Post by Charles Richmond
So a "machine check" would be like the "engine light" turning on...
on your car's dashboard??? It could indicate a tremendous number of
different conditions, right???

On S/360 et al, a bad instruction will cause an instruction check
exception which will 'abend' the program and produce a core dump for
diagnostics, but not stop the machine. Normally this error was rather
rare, but it was possible if an error somewhere else in the program
caused an overlay in memory (such as by inproper subscripting). A
little tricky to debug.

Actual CPU machine checks were extremely rare. Tape and disk machine
checks were rare, too. Printer, reader, and punch checks did occur,
usually a jammed card or some mechanical problem.

In those years the widespread customer base of IBM meant that a C/E
was never far away--our C/E served only our own industrial
neighborhood. He'd come running for serious problems and keep our
downtime to a minimum.

In contrast, for the above Univac 90/30, our C/E served a much wider
area and had less back office support. Consequently printer/reader
mechanical troubles could keep us out of service for a while.

jmfbahciv

2012-12-04 12:19:18 UTC

ROTFLMAO. You have been valuable in our group. Did any
operator get a panic attack during one of the runs?

<snip>

/BAH

Charlie Gibbs

2012-12-05 02:27:44 UTC

Post by Charlie Gibbs
I once wrote a little program for the 9300 that would just run the
card reader at full speed. But while waiting for the reader to
come ready, instead of spinning in a tight little TIO/BC loop,
I filled memory with binary zeros and fell through it. Since
the 9300's normal front-panel display was the first two bytes
of the currently-executing instruction, this caused all the
lights to go out, which normally could never happen while a
program was running. I called it "Read Cards in the Dark."

ROTFLMAO. You have been valuable in our group. Did any
operator get a panic attack during one of the runs?

My best one was a production program that read a bunch of
paper tapes, built a summary table in memory, then paused
for 60 seconds while it sorted the table before printing
the summary report. I replaced the bubble sort with an
insertion sort that kept the table in sequence as it built
it - the CPU time was hidden by the I/O wait time. I didn't
tell anyone I was doing this, and the first time the operator
ran it he did have a panic attack when the familiar delay
didn't happen:

Operator: There's something wrong with your program!
[This was his standard opening.]
Me: Oh, what? [This was my standard reply.]
Operator: It didn't sort!
Me: Check the listing. Is it in sequence?
Operator (after going off and checking): Uh, yeah...

jmfbahciv

2012-12-05 13:56:33 UTC

ROTFLMAO. You have been valuable in our group. Did any
operator get a panic attack during one of the runs?

My best one was a production program that read a bunch of
paper tapes, built a summary table in memory, then paused
for 60 seconds while it sorted the table before printing
the summary report. I replaced the bubble sort with an
insertion sort that kept the table in sequence as it built
it - the CPU time was hidden by the I/O wait time. I didn't
tell anyone I was doing this, and the first time the operator
ran it he did have a panic attack when the familiar delay
Operator: There's something wrong with your program!
[This was his standard opening.]
Me: Oh, what? [This was my standard reply.]
Operator: It didn't sort!
Me: Check the listing. Is it in sequence?
Operator (after going off and checking): Uh, yeah...

<GRIN> You are cruel. The worst thing to happen is for
behaviour, especially sounds, to change or disappear.

/BAH

Shmuel (Seymour J.) Metz

2012-12-05 20:34:05 UTC

Post by jmfbahciv
<GRIN> You are cruel.

Cruel? Cruel is lifting the carriage brushes on a 1403 (original
model).

h***@bbs.cpcn.com

2012-12-05 17:43:45 UTC

Operator: There's something wrong with your program!
[This was his standard opening.]
Me: Oh, what? [This was my standard reply.]
Operator: It didn't sort!
Me: Check the listing. Is it in sequence?
Operator (after going off and checking): Uh, yeah...

You were fortunate to have an operator who noticed and reported
something out of routine; normally that could be a problem. A great
many operators and support staff were like that and immensely helpful.

But as data centers merged and got larger and systems more automated
and sophisticated amd operators becomming anonymous, that personal
relationship and observation went away.

jmfbahciv

2012-12-06 14:19:46 UTC

You were fortunate to have an operator who noticed and reported
something out of routine; normally that could be a problem. A great
many operators and support staff were like that and immensely helpful.
But as data centers merged and got larger and systems more automated
and sophisticated amd operators becomming anonymous, that personal
relationship and observation went away.

The personal stuff went away when main frames stopped being the center
of the processing. Distributed processing and physically smaller systems
stopped people from talking to each other. There wasn't any central
meeting place (like lline printers or consoles or other hardware)
where the programmers and operators could bullshit with each other
for a couple of minutes while waiting for the computer to finish the
task.

/BAH

Charles Richmond

2012-12-06 00:55:42 UTC

ROTFLMAO. You have been valuable in our group. Did any
operator get a panic attack during one of the runs?

My best one was a production program that read a bunch of
paper tapes, built a summary table in memory, then paused
for 60 seconds while it sorted the table before printing
the summary report. I replaced the bubble sort with an
insertion sort that kept the table in sequence as it built
it - the CPU time was hidden by the I/O wait time. I didn't
tell anyone I was doing this, and the first time the operator
ran it he did have a panic attack when the familiar delay
Operator: There's something wrong with your program!
[This was his standard opening.]
Me: Oh, what? [This was my standard reply.]
Operator: It didn't sort!
Me: Check the listing. Is it in sequence?
Operator (after going off and checking): Uh, yeah...

Charlie, if you add the new item at the *beginning* of a sorted list.... and
do *one* interation though the bubble loop... you can keep the list sorted
as you go *without* changing to the insertion sort. You'll still be sorting
as you go.

Each interation of the bubble loop will leave *one* new item sorted in
order.

--

numerist at aquaporin4 dot com

Charlie Gibbs

2012-12-06 06:52:03 UTC

Post by Charles Richmond
Charlie, if you add the new item at the *beginning* of a sorted
list.... and do *one* interation though the bubble loop... you
can keep the list sorted as you go *without* changing to the
insertion sort. You'll still be sorting as you go.
Each interation of the bubble loop will leave *one* new item
sorted in order.

I don't quite follow. Here's how I do it. Since the table
is always in sequence, I do a binary search for the new key.
(If the key is already in the table, accumulate totals in the
existing entry and we're done.) Starting at the end of the
table, shift entries up one, working backwards until we reach
the point where the binary search failed, add new entry there,
initialize the total accumulators, and bump the entry counter.

This works quite well, and is fairly efficient if a significant
number of keys occur more than once in the input data.

Shmuel (Seymour J.) Metz

2012-12-03 14:58:59 UTC

Post by Charles Richmond
So a "machine check" would be like the "engine light" turning on...
on your car's dashboard???

More like the engine shutting off at the same time.

Post by Charles Richmond
It could indicate a tremendous number of different
conditions, right???

Yes, similar to the check stop light on later machines, except that
you didn't have the option of taking an interrupt instead of stopping.

Walter Banks

2012-12-01 12:58:12 UTC

Post by Walter Banks
The "Halt & Catch Fire" term originated when Gerry Wheeler
fully mapped out the Motorola 6800 implemented instruction set

I was familiar with HCF on joke instruction mnemonic lists before the first
microprocessor was invented.

I believe you and Charlie are correct. I remember an IBM
Appendix F Overextended Mnemonics that was circulating. I just
did a quick search and saw lots of references but no original
documents.

w..

Walter Bushell

2012-12-01 18:48:34 UTC

Post by Walter Banks
The "Halt & Catch Fire" term originated when Gerry Wheeler
fully mapped out the Motorola 6800 implemented instruction set

I was familiar with HCF on joke instruction mnemonic lists before the first
microprocessor was invented.

I believe you and Charlie are correct. I remember an IBM
Appendix F Overextended Mnemonics that was circulating. I just
did a quick search and saw lots of references but no original
documents.
w..

Oh, yes and Double Pack Decimal -- DPD?

--
This space unintentionally left blank.

Charlie Gibbs

2012-12-03 04:25:37 UTC

Post by Walter Banks
The "Halt & Catch Fire" term originated when Gerry Wheeler
fully mapped out the Motorola 6800 implemented instruction set

I was familiar with HCF on joke instruction mnemonic lists before
the first microprocessor was invented.

I believe you and Charlie are correct. I remember an IBM
Appendix F Overextended Mnemonics that was circulating. I just
did a quick search and saw lots of references but no original
documents.

Oh, yes and Double Pack Decimal -- DPD?

Make that Triple Pack Decimal. Here's the largest of the
lists I've corrected...

Wed Apr 15 23:04:40 1992
Message : #3192287 From: DaviD W. Sanderson
Address : ***@margay.cs.wisc.edu
Group : NETCOMP.FolkLore
Length : 5645 words
Subject : canonical opcode list (LONG!)

Msg-ID: <***@spool.cs.wisc.edu>
Posted: 16 Apr 92 03:57:30 GMT

Org. : UW-Madison Computer Sciences Department

It's been a while since I last posted this.

Here's my canonical alphabetized list of assembler opcodes that really
ought to exist somewhere. It is the combination of all the lists of
such opcodes I have seen. (My thanks to all who have contributed to
this list.) I welcome any new opcodes you may wish to contribute!

The shar also includes a script which, when fed the opcodes file,
produces a corresponding regular nroff man page.

DaviD W. Sanderson (***@cs.wisc.edu)

#!/bin/sh
# This is a shell archive (produced by shar 3.49)
# To extract the files from this archive, save it to a file, remove
# everything above the "!/bin/sh" line above, and type "sh file_name".
#
# made 04/16/1992 03:48 UTC by ***@margay
# Source directory /var/home/dws/pub/dws/funops
#
# existing files will NOT be overwritten unless -c is specified
#
# This shar contains:
# length mode name
# ------ ---------- ------------------------------------------
# 30154 -rw------- opcodes
# 946 -rwx------ mkman
#
# ============= opcodes ==============
if test -f 'opcodes' -a X"$1" != X"-c"; then
echo 'x - skipping opcodes (File already exists)'
else
echo 'x - extracting opcodes (Text)'
sed 's/^X//' << 'SHAR_EOF' > 'opcodes' &&
AAC Alter All Commands
AAD Alter All Data
AAO Add And Overflow
AAR Alter At Random
AB Add Backwards
ABC AlphaBetize Code
ABR Add Beyond Range
ACC Advance CPU Clock
ACDC Allow Controller to Delete Contents
ACDP Allow Controller to Die Peacefully
ACQT Advance Clock to Quitting Time
ADB Another Damn Bug
AEE Absolve Engineering Errors
AFF Add Fudge Factor
AFHB Align Fullword on Halfword Boundary
AFP Abnormalize Floating Point
AFR Abort Funny Routine
AFVC Add Finagle's Variable Constant
AGB Add GarBage
AGWA Add and Get Wrong Answer
AI Add Improper
AIB Attack Innocent Bystander
AIB Attack Innocent Bystanders
AISG Access and Improve Student Grade
AMM Add Mayo and Mustard
AMM Answer My Mail
AMS Add Memory to System
ANC ANnoy Consultant
ANFSCD And Now For Something Completely Different
AOI Annoy Operator Immediate
AR Advance Rudely
AR Alter Reality
ARN Add and Reset to Non-zero
ARN Add and Reset to Nonzero
ARZ Add and Reset to Zero
AS Add Sideways
ASQGSA ASCII Stupid Question, Get a Stupid ANSI
AT Accumulate Trivia
AWP Argue With Programmer
AWTT Assemble With Tinker Toys
BA Branch Anywhere
BAC Branch to Alpha Centauri
BAD Branch And Die
BAD Branch to Auto Destruct
BAF Blow All Fuses
BAFL Branch And FLush
BAH Branch And Hang
BALC Branch And Link Cheeseburger
BAP Branch And Punt
BAW Bells And Whistles
BB Branch on Bug
BBBB Byte Baudy Bit and Branch
BBBF Branch on Bit Bucket Full
BBD Branch on Bastille Day
BBI Branch on Burned-out Indicator
BBIL Branch on Burned-out Indicator Light
BBLB Branch on Blinking Light Bulb
BBT Branch on Binary Tree
BBW Branch Both Ways
BCB Burp and Clear Bytes
BCF Branch and Catch Fire
BCF Branch on Chip box Full
BCIL Branch Creating Infinite Loop
BCR Backspace Card Reader
BCS Branch and Crash System
BCU Be Cruel and Unusual
BD Backspace Disk
BD Branch to Data
BDC Break Down and Cry
BDI Branch to Data Indirect
BDM Branch and Disconnect Memory
BDT Burn Data Tree
BDU Branch on Dense User
BE Branch Everywhere
BEW Branch Either Way
BF Belch Fire
BF Blow Fuse
BF Branch Forever
BFD Branch on Full Disk
BFF Branch and Form Feed
BFM Be Fruitful and Multiply
BH Branch and Hang
BIR Branch Inside Ranch
BIRM Branch on Index Register Missing
BLC Branch and Loop Continuous
BLI Branch and Loop Infinite
BLM Branch, Like, Maybe
BLMWM Branch, Like, Maybe, Wow, Man
BLP Boot from Line Printer
BLR Branch and Lose Return
BLSH Buy Low, Sell High
BLT Break Little Thing
BM Branch Maybe
BMI Blow up Memory Immediate
BMI Branch on Missing Index
BMI Branch to Muncee Immediate
BMP Branch and Make Popcorn
BMR Branch Multiple Registers
BMUS Beam Me Up, Scotty
BNA Branch to Nonexistant Address
BNCB Branch and Never Come Back
BNL Become a Neo-Luddite
BNR Branch for No Reason
BOB Branch On Bug
BOD Beat On Disk
BOD Branch on Operator Desperate
BOH Branch On Humidity
BOH Branch on Operator High
BOHP Bribe Operator for Higher Priority
BOI Byte Operator Immediately
BOP Boot OPerator
BOT Branch On Tree
BPB Branch on Program Bug
BPDI Be Polite, Don't Interrupt
BPIM Bury Programmer In Manuals
BPL Branch PLease
BPM Become a Psych Major
BPO Branch on Power Off
BPO Branch on Power On
BPP Branch and Pull the Plug
BR Byte and Run
BRA Branch to Random Address
BRB BRanch on Beaver
BRH BRanch & Hang
BRI BRanch Indefinitely
BRL BRanch and Leak
BRO BRanch and Overheat
BRO BRanch to Oblivion
BS Behave Strangely
BSC Branch on Second Coming
BSC Burst Selector Channel
BSD BackSpace Disk
BSI Back up Sewer Immediate
BSI Backup Sewer Immediately
BSM Branch and Scramble Memory
BSO Branch on Sleepy Operator
BSP BackSpace Punch
BSR Branch and Stomp Registers
BSS Branch on SunSpot
BSST BackSpace and Stretch Tape
BTD Branch on Time of Day
BTD Byte The Dust
BTI Blow Trumpet Immediately
BTJ Branch and Turn Japanese
BTO Branch To Oblivion
BTW Branch on Third Wednesday
BU Branch Unexpectedly
BUTI Blow Up Terminal Immediately
BVS Branch and Veer South
BW Branch on Whim
BWABL Bells, Whistles, And Blinking Lights
BWC Branch When Convenient
BWF Busy, Wait Forever
BWOP BeWilder OPerator
BYDS Beware Your Dark Side
BYTE BYte TEst
CAC Calling All Cars
CAC Cash And Carry
CAF Convert ASCII to Farsii
CAI Corrupt Accounting Information
CAIL Crash After I Leave
CAR Cancel Accounts Receivable
CAT Confused And Tired
CB Consult Bozo
CBA Compare and Branch Anyway
CBBR Crash and Blow Boot Read-only memory
CBNC Close, But No Cigar
CBS Clobber BootStrap
CC Call Cavalry
CC Complement Core
CCB Chocolate Chip Byte-mode
CCB Consult Crystal Ball
CCC Crash if Carry Clear
CCCP Conditionally Corrupt Current Process
CCD Choke Cough and Die
CCD Clear Core and Dump
CCR Change Channels at Random
CCS Chinese Character Set
CCWR Change Color of Write Ring
CD Complement Disk
CDC Clear Disk and Crash
CDC Close Disk Cover
CDIOOAZ Calm Down, It's Only Ones And Zeroes
CDS Change Disk Speed
CEMU Close Eyes and Monkey with User space
CEX Call EXterminator
CF Come From [replaces goto]
CFE Call Field Engineer
CFP Change and Forget Password
CFS Corrupt File Structure
CG Convert to Garbage
CH Create Havoc
CHCJ Compare Haig to Christine Jorgensen
CHPAMR CHase Pointers Around Machine Room
CHSE Compare Half-words and Swap if Equal
CIB Change Important Byte
CIC Cash In Chips
CID Compare and Ignore Data
CIMM Create Imaginary Memory Map
CIZ Clear If Zero
CLBR CLoBber Register
CLBRI CLoBber Register Immediate
CM Circulate Memory
CMD Compare Meaningless Data
CMD CPU Melt Down
CMI Clobber Monitor Immediate
CML Compute Meaning of Life
CMP Create Memory Prosthesis
CMS Click MicroSwitch
CN Compare Nonsensically
CNB Cause Nervous Breakdown
CNS Call Nonexistent Subroutine
COCS Copy Object Code to Source
COD Crash On Demand
COLB Crash for Operator's Lunch Break
COM Clear Operator's Mind
COMF COMe From
CON Call Operator Now
COS Copy Object code to Source file
COWYHU Come Out With Your Hands Up
CP Compliment Programmer
CP%FKM CPU \(em FlaKeout Mode
CP%WM CPU \(em Weird Mode
CPB Create Program Bug
CPN Call Programmer Names
CPPR Crumple Printer Paper and Rip
CRASH Continue Running After Stop or Halt
CRB CRash and Burn
CRD Confirm Rumor by Denial
CRM CReate Memory
CRM Clear Random Memory
CRN Compare with Random Number
CRN Convert to Roman Numerals
CRYPT reCuRsive encrYPt Tape
CS Crash System
CSL Curse and Swear Loudly
CSN Call Supervisor Names
CSNIO Crash System on Next I/O
CSS Crash Subsidiary Systems
CSU Call Self Unconditional
CTDMR Change Tape Density, Mid Record
CTT Call Time and Temperature
CU Convert to Unary
CUC Cheat Until Caught
CVFL ConVert Floating to Logical
CVFP ConVert Fortran to Pascal
CVG ConVert to Garbage
CVU ConVert to Unary
CWAH Create Woman And Hold
CWB Carry With Borrow
CWDC Cut Wires and Drop Core
CWG Chase Wild Goose
CWGK Compare Watt to Genghis Khan
CWIT Compare Watt to Ivan the Terrible
CWM Compare Watt to Mussolini
CWOM Complement Write-Only Memory
CZZC Convert Zone to Zip Code
DA Develop Amnesia
DAB Delete All Bugs
DAC Divide And Conquer
DAD Destroy A-Disk
DAO Divide And Overflow
DAP De-select Active Peripheral
DAUF Delete All Useless Files
DB Drop Bits
DBL Desegregate Bus Lines
DBR DeBase Register
DBTP Drop Back Ten and Punt
DBZ Divide By Zero
DC Degauss Core
DC Divide and Conquer
DCAD Dump Core And Die
DCD Drop Cards Double
DCGC Dump Confusing Garbage to Console
DCI Disk Crash Immediate
DCON Disable CONsle
DCR Double-precision CRash
DCT Drop Cards Triple
DCWPDGD Drink Coffee, Write Program, Debug, Get Drunk
DD Destroy Disk
DD Drop Disk
DDC Dally During Calculations
DDOA Drop Dead On Answer
DDS Delaminate Disk Surface
DDT Debug Program
DDWB Deposit Directly in Waste Basket
DEB Disk Eject Both
DEC Decompile Executable Code
DEI Disk Eject Immediate
DEM Disk Eject Memory
DFA Disable FAns
DGO Decrement the Grades of Others
DGT Dispense Gin and Tonic
DHTPL Disk Head Three Point Landing
DIA Develop Ineffective Address
DICE Delete Invalid Customer Engineer
DIE DIsable Everything
DIF DIsable Fuses
DIG DIsable Gravity
DIH Disable Interrupts and Hang
DIIL Disable Interrupts and enter Infinite Loop
DIRFO Do It Right For Once
DISC DISmount CPU
DK Destroy Klingons
DK%WMM DisK unit \(em Washing Machine Mode
DKP Disavow Knowledge of Programmer
DLN Don't Look Now
DLP Drain Literal Pool
DMAG Do MAGic
DMNS Do what i Mean, Not what i Say
DMP Destroy Memory Protect key
DMPE Decide to Major in Phys. Ed.
DMPK Destroy Memory Protect Key
DMZ Divide Memory by Zero
DND Destroy Neighbor's Data
DNPG Do Not Pass Go
DO Divide and Overflow
DO Divide and Overflow [IBM PC]
DOC Drive Operator Crazy
DOV Divide and OVerflow
DP Destroy Peripherals
DPC Decrement Program Counter
DPCS Decrement Program Counter Secretly
DPK Destroy storage Protect Key
DPMI Declare Programmer Mentally Incompetent
DPN Double Precision No-op
DPR Destroy PRogram
DPS Disable Power Supply
DR Detach Root
DRAF DRAw Flowchart
DRAM Decrement RAM
DRBA Deposit Round-off in my Bank Account
DRD DRop Dead
DRI Disable Random Interrupt
DROM Destroy ROM
DRT Disconnect Random Terminal
DS Deadlock System
DSD Dismount System Disk
DSI Do Something Interesting
DSO Disable System Operator
DSP Degrade System Performance
DSR Detonate Status Register
DSTD Do Something Totally Different
DSUIT Do Something Utterly, Indescribably Terrible
DT%FFP DecTape \(em unload and Flappa FlaP
DT%SHO DecTape \(em Spin Hubs Opposite
DTB Destructively Test Bit
DTC Destroy This Command
DTE Decrement Telephone Extension
DTI Do The Impossible
DTRT Do The Right Thing
DTVFL Destroy Third Variable From Left
DU Dump User
DUD Do Until Dead
DW Destroy World
DWIM Do What I Mean
DWIT Do What I'm Thinking
DWIW Do What I Want
EA Enable Anything
EAC Emulate Acoustic Coupler
EAL Enable AC to Logic rack
EAO Enable AC to Operator
EBB Edit and Blank Buffer
EBB Empty Bit Bucket
EBR Erase Before Reading
EBRS Emit Burnt Resistor Smell
EC Eat Card
ECF Explode and Catch Fire
ECL Early Care Lace
ECO Electrocute Computer Operator
ECP Erase Card Punch
ED Eject Disk
ED Execute Data
EDD Eat Disk and Die
EDIT Erase Data and Increment Time
EDP Emulate Debugged Program
EDR Emit Deadly Radiation
EDR Execute Destructive Read
EDS Execute Data Segment
EEOIFNO Execute Every Other Instruction From Now On
EEP Erase Entire Program
EFB Emulate Five-volt Battery
EFD Eject Floppy Disk
EFD Emulate Frisbee using Disk pack
EFE Emulate Fatal Error
EHC Emulate Headless Chicken
EIA Elvis Is Alive
EIAO Execute In Any Order
EIEIO Evaluate, Increment, Excrement, Invert, Output
EIO Erase I/O page
EIO Execute Invalid Op-code
EIO Execute Invalid Opcode
EIOC Execute Invalid Op-Code
EJD EJect Disk
EJD%V EJect Disk \(em with initial velocity V
ELP Enter Loop Permenantly
EM EMulate 407
EM Evacuate Memory
EMIF Erase Most Important File
EMM Emulate More Memory
EMPC EMulate Pocket Calculator
EMSE Edit and Mark Something Else
EMSL Entire Memory Shift Left
EMT Electrocute Maintenance Technician
EMW Emulate Maytag Washer
ENA ENable Anything
END Erase Neighbor's Data
ENF Emit Noxious Fumes
ENG ENable Gravity
ENO Emulate No-Op
EO Electrocute Operator
EOB Execute Operator and Branch
EOI Explode On Interrupt
EOS Erase Operating System
EP Execute Programmer
EPD Explode Peripheral Device
EPI Execute Programmer Immediate
EPITS Execute Previous Instruction Then Skip
EPL Emulate Phone Line
EPP Eject Printer Paper
EPS Electrostatic Print and Smear
EPS Execute Program Sideways
EPSW Execute Program Status Word
EPT Erase Process Table
EPT Erase Punched Tape
ERIC Eject Random Integrated Circuit
ERM Erase Reserved Memory
EROM Erase Read-Only Memory
EROS Erase Read-Only Storage
EROS Erase Read-Only Storage [Everex int]
ERS Erase Read-only Storage
ESB Eject Selectric Ball
ESC Emulate System Crash
ESD Eat Shit and Die
ESD Eject Spinning Dish
ESL Exceed Speed of Light
ESP Enable SPrinkler system
ETI Execute This Instruction
ETM Emulate Trinary Machine
ETPH E. T. Phone Home
EVC Execute Verbal Commands
EWD Enter Warp Drive
EWM Enter Whimsy Mode
EXB EXcrement and Branch
EXE EXecute Engineer
EXI EXecute Invalid operation
EXO EXecute Operator
EXOP EXecute OPerator
EXP EXecute Programmer
EXPP EXecute Political Prisoner
FAY Fetch Amulet of Yendor
FB Find Bugs
FC Fry Console
FCJ Feed Card and Jam
FCJ Feed Cards and Jam
FD Forget Data
FDR Feed Disk Randomly
FERA Forms Eject and Run Away
FFF Form Feed Forever
FLD FLing Disk
FLI Flash Lights Impressively
FM Forget Memory
FMP Finish My Program
FOPC False Out-of-Paper Condition
FPC Feed Paper Continuously
FPT Fire Photon Torpedoes
FRG Fill with Random Garbage
FRS Fetch Ring of Sauron
FS Feign Sleep
FSM Fold, Spindle, and Mutilate
FSR Form Skip and Runaway
FSRA Forms Skip and Run Away
FYBR Follow Yellow Brick Road
GAP Grade All Projects
GBB Go to Back of Bus
GCAR Get Correct Answer Regardless
GCR Generate Confusing Results
GDP Grin Defiantly at Programmer
GDR Grab Degree and Run
GENT GENerate Thesis
GEW{JO} Go to the End of the World {Jump Off}
GFD Go Forth and Divide
GFM Go Forth and Multiply
GIE Generate Irreversible Error
GLC Generate Lewd Comment
GMC Generate Machine Check
GMCC Generate Machine Check and Cash
GND Guess at Next Digit
GORS GO Real Slow
GPCR Generate Petty Cache Request
GREM Generate Random Error Message
GREP Global Ruin, Expiration, and Purgation
GRMC Generate Rubber Machine Check
GS Get Strange
GSB Gulp and Store Bytes
GSI Generate Spurious Interrupts
GSU Geometric Shift Up
GTJ Go To Jail
HACF Halt And Catch Fire
HAH Halt And Hang
HBW Hang Bus and Wait
HCF Halt and Catch Fire
HCP Hide Central Processor
HCRS Hang in CRitical Section
HDH Hi Dee Ho
HDO Halt and Disable Operator
HDRW Halt and Display Random Word
HELP Hinder Everyone with Little Productivity
HELP Type 'No Help Available'
HEO Halt and Execute Operator
HF Hide File
HGD Halt, Get Drunk
HHB Halt and Hang Bus
HIS Halt in Imposible State
HOO Hide Operator's Output
HRPR Hang up and Ruin Printer Ribbon
HSC Halt on System Crash
HSJ Halt, Skip and Jump
HTC Halt and Toss Cookies
HTS Halt and Throw Sparks
HUAL Halt Until After Lunch
HUP Hang Up Phone
HWP Halt Without Provocation
IA Illogical And
IAE Ignore All Exceptions
IAI Inquire And Ignore
IAND Illogical AND
IAR Ignore All Requests
IB Insert Bug
IBM Increment and Branch to Muncee
IBP Insert Bug and Proceed
IBR Insert Bugs at Random
ICB Interrupt, Crash and Burn
ICM Immerse Central Memory
ICMD Initiate Core Melt Down
ICR Incur Costly Repair [Sun Tempest]
ICSP Invert Crt Screen Picture
IDC Initiate Destruct Command
IDI Invoke Divine Intervention
IDNOP InDirect No-OP
IDPS Ignore Disk Protect Switch
IEOF Ignore End Of File
IF Invoke Force
IGI Increment Grade Immediate
IGIT Increment Grade Immediate Twice
IGO Increment Grade Overnight
IHC Initiate Head Crash
IHTFP Increment Hormones, Test For Puberty
II Inquire and Ignore
IIB Ignore Inquiry and Branch
IIC Insert Invisible Characters
IIL Irreversable Infinite Loop
IM Imagine Memory
IMBP Insert Mistake and Blame Programmer
IMP Imitate Monty Python
IMPG IMPress Girlfriend
IMV IMpress Visitors
INCAM INCrement Arbitrary Memory
ING INquire & iGnore
INI Ignore Next Instruction
INOP Indirect No-OP
INR INstigate Rumor
INW INvalidate Warranty
IOI Ignore Operator's Instruction
IOR Illogical OR
IOS Ignore Operating System
IP Increment and Pray
IPI Ignore Previous Instruction
IPM Ignore Programmer's Mistakes
IPOP Interrupt Processor, Order Pizza
IPS Incinerate Power Supply
IPS Increment Power Supply
IPT Ignite Paper Tape
IRB Invert Record and Branch
IRBI Insert Random Bits Indexed
IRC Insert Random Commands
IRE Insert Random Errors
IRI Ignore Rude Interrupts
IRPF Infinite Recursive Page Fault
ISC Ignore Supervisor Calls
ISC Ignore System Crash
ISC Insert Sarcastic Comments
ISI Increment and Skip on Inifinity
ISP Increment and Skip on Pi
ISTK Invert STacK
ITML Initiate Termites into Macro Library
IU Ignore User[s]
IXOR Illogical eXclusive OR
IZ Ignore Zeroes
JAA Jump Almost Always
JBS Jump and Blow Stack
JCI Jump to Current Instruction
JFM Jump on Full Moon
JHRB Jump to H&R Block
JLP Jump and Lose Pointer
JLR Jump and Lose Return
JMAT JuMp on Alternate Thursdays
JN Jump to Nowhere
JNL Jump when programmer is Not Looking
JOB Jump On Beaver
JOM Jump Out of Memory
JOM Jump Over Moon
JOP Jump OPerator
JPA Jump when Pizza Arrives
JRAN Jump RANdom
JRCF Jump Relative and Catch Fire
JRGA Jump Relative and Get Arrested
JRL Jump to Random Location
JRSR Jump to Random SubRoutine
JSC Jump on System Crash
JSOR Jump Somewhere Over Rainbow
JSU Jump Self Unconditional
JT Jump if Tuesday
JTT Jump and Tangle Tape
JTZ Jump to Twilight Zone
JWN Jump When Necessary
KCE Kill Consultant on Error
KCE Kill repairman [CE]
KDO Knock Disk Over
KEPITU Kill Every Process In The Universe
KOP Kill OPerator
KP Krunch Paper
KPR Kill PRogrammer
KSR Keyboard Shift Right
KUD Kill User's Data
KWWE Kill Wicked Witch of East
KWWW Kill Wicked Witch of West
LAC Lose All Communication
LAGW Load And Go Wrong
LAP Laugh At Program
LAP Laugh At Programmer
LCC Load and Clear Core
LCD Launch Cartridge Disk
LCK Lock Console Keyswitch
LEB Link Edit Backwards
LIA Load Ineffective Address
LMB Lose Message and Branch
LMO Load and Mug Operator
LMYB Logical MaYBe
LN Lose inode Number
LNP Load N digits of Pi
LOSM Log Off System Manager
LP%PAS Line Printer \(em Print And Smear
LP%RDD Line Printer \(em Reverse Drum Direction
LP%TCR Line Printer \(em Tangle and Chew Ribbon
LPA Lead Programmer Astray
LPRTC Load Program counter from Real Time Clock
LR Load Revolver
LRA Load RetroActively
LRB Lose Record and Branch
LRD Load Random Data
LSPSW Load and Scramble PSW
LTS Link To Sputnik
LTS Loop Till Smokes
LUM LUbricate Memory
LWE Load WhatEver
LWM Load Write-only Memory
MAB Melt Address Bus
MAN Make Animal Noises
MAZ Multiply Answer by Zero
MBC Make Batch Confetti
MBF Multiply and Be Fruitful
MBH Memory Bank Hold-up
MBTD Mount Beatles on Tape Drive
MBTOL Move Bug To Operator's Lunch
MC Move Continuous
MD Move Devious
MDB Move and Drop Bits
MDC Make Disk Crash
MDDHAF Make Disk Drive Hop Across Floor
MFO Mount Female Operator
MLB Memory Left shift and Branch
MLP Make Lousy Program
MLP Multiply and Lose Precision
MLR Move and Lose Record
MMF Melt Main Frame
MMLG Make Me Look Good
MNI Misread Next Instruction
MOG Make Operator Growl
MOP Modify Operator's Personality
MOU MOunt User [causes computer to screw you]
MPLP Make Pretty Light Pattern
MRZ Make Random Zap
MSGD Make Screen Go Dim
MSP Mistake Sign for Parity
MSPI Make Sure Plugged In
MSR Melt Special Register
MST Mount Scotch Tape
MT%HRDV Mag Tape \(em High speed Rewind and Drop Vaccuum
MTE Mangle Tape on Exit
MTI Make Tape Invalid
MUG Make Ugly Graphics
MUM Multi-Use Mnemonics
MW Malfunction Whenever
MW Multiply Work
MWAG Make Wild-Assed Guess
MWC Move and Wrap Core
MWT Malfunction Without Telling
NBC Negate By Clearing
NCW Notch Carriage and Way
NMI Negate Most Integers
NOP Needlessly Omit Pointer
NPC Normalize Program Counter
NPN No Program Necessary [VAX]
NTGH Not Tonight, i've Got a Headache
OBB Overflow Bit Bucket
OCF Open Circular File
OMC Obscene Message to Console
OMC Overheat Memory Chip
OML Obey Murphy's Laws
OPI Order Pizza Immediately
OPP Order Pizza for Programmer
OSI Overflow Stack Immediate
OSI Overflow Stack Indefinite
OSP Open Six-Pack
OTL Out To Lunch
OU Offend User
P$*! Punch Obscenity
PA Punch in ASCII
PAL Pack And Leave
PAS Print And Smear
PAUD PAUse Dramatically
PAZ Pack Alpha Zone
PAZ Pack Alpha and drop Zones
PBC Print and Break Chain
PBD Print and Break Drum
PBL Pack Bags and Leave
PBM Pop Bubble Memory
PBPBPBP Place Backup in Plain Brown Paper Bag Please
PBST Play Batch mode Star Trek
PCB Pause for Coffee Break
PCD PunCh Disk
PCI Pleat Cards Immediate
PCR Print and Cut Ribbon
PCS Push to Centre of Stack
PD Play Dead
PD Punch Disk
PDLD Power Down and Lock Door [to computer room]
PDSK Punch DiSK
PEHC Punch Extra Holes in Cards
PEP Print on Edge of Paper
PFD Punt on Fourth Down
PFE Print Floating Eye
PFML Print Four Million Lines
PG Print Garbage
PHO Pull Hair Out
PI Punch Invalid
PIBM Pretend to be an IBM
PIC Print Illegible Characters
PIC Print Invalid Character
PIC Punch Invalid Character
PLSC Perform Light Show on Console
PNIH Place Needle In Haystack
PNRP Print Nasty Replies to Programmer
PO Punch Operator
POCL Punch Out Console Lights
POG Print Only Greek
POP Pop Or Push
POPI Punch OPerator Immediate
POPN Punch OPerator's Nose
PPA Print Paper Airplanes
PPC Purge Pascal Compiler [HP 3000]
PPL Perform Perpetual Loop
PPP Print Programmer's Picture
PPR Play Punk Rock
PPSW Pack Program Status Word
PPSW Pack Progran Status Word
PRS PRint and Smear
PSP Print and Shred Paper
PSR Print and Shred Ribbon
PTP Produce Toilet Paper
PUO Perform Unknown Operation
PVLC Punch Variable Length Card
PWP Print Without Paper
PWS create PoWer Surge
PYS Program YourSelf
QBDH Quit and Become a DeadHead
QWYA Quit While Your Ahead
RA Randomize Answer
RAM Read Ambiguous Memory
RAN RANdom opcode [similar to 16-bit what gate]
RASC Read And Shred Card
RAST Read And Shred Tape
RAU Ridicule All Users
RBAO Ring Bell and Annoy Operator
RBLY Restore Back-up from Last Year
RBT Read Blank Tape
RBT Rewind and Break Tape
RC Rewind Core
RCAJ Read Card And Jam
RCB Read Command Backwards
RCB Run Clock Backwards
RCC Read Card and Chew
RCCP Randomly Corrupt Current Process
RCF Rewind Cabinet Fans
RCKG Read Count Key and Garbage
RCL Rotate Carry Left
RCP Reschedule Car Payments
RCR Rewind Card Reader
RCRV Randomly Convert to Reverse Video
RCS Read Card & Scramble data
RCSD Read Card, Scramble Data
RD Randomize Data
RD Reverse Directions
RDA Refuse to Disclose Answer
RDB Replace Database with Blanks
RDB Run Disk Backwards
RDD Reverse Disk Drive
RDDBF Rock Disk Drive Back and Forth
RDEB Read and Drop Even number of Bits
RDF Randomize Directory Filenames
RDI Reverse Drum Immediate
RDI Reverse Drun Immediate
RDI Rewind Disk Immediate
RDR Reverse Disk Rotation
RDS ReaD Sideways
RENVR REName Variables Randomly
RET Read and Erase Tape
RF Read Fingerprints
RG Record Garbage
RHNEZ Randomize and Halt if Not Equal to Zero
RHO Randomize and Hold all Output
RIC Rotate Illogical thru Carry
RID Read Invalid Data
RIG Read Inter-record Gap
RIOP Rotate I/O Ports
RIR Read Invalid Record
RIRG Read Inter-Record Gap
RJE Return Jump and Explode
RLC Relocate and Lose Core
RLC Reread Last Card
RLC Rotate Left with Carolyn
RLI Rotate Left Indefinitely
RLP Refill Light Pen
RLP Rewind Line Printer
RM Ruin My files
RMI Randomize Memory Immediate
RMM Read Manager's Mind
RMT ReMove Trap
RMV Remove Memory Virtues
RN Read Noise
RNBS Reflect Next Bus Signal
RNR Read Noise Record
ROC Randomize Op Codes
ROC Rotate Outward from Center
ROD ROtate Diagonally
ROM Read Operator's Mind
ROO Rub Out Operator
ROOP Run Out Of Paper
ROPF Read Other People's Files
ROS Reject Operating System
ROS Return On Shield
RP Read Printer
RPB Raise Parity Bits
RPB Read Print and Blush
RPB Reverse Parity and Branch
RPBR Reverse Parity and BRanch
RPC Rotate Program Counter
RPM Read Programmer's Mind
RPU Read character and Print Upsidedown
RRC Rotate Random thru Carry
RRR Randomly Rotate Register
RRR Read Record and Run away
RRR Read Record and Run-away
RRRL Random Rotate Register Left
RRRR Random Rotate Register Right
RRSGWSSNK Round and Round She Goes, Where She Stops, Nobody Knows
RRSTC Return on Ruby Slippers Triple-Click
RRT Record and Rip Tape
RS Random Slew
RSD on Read error Self-Destruct
RST Rewind and Stretch Tape
RSTOM Read from STore-Only Memory
RT Reduce Throughput
RTP Reduce ThroughPut
RTS Return To Sender
RVAC Return from VACation
RWC ReWind and Crash heads
RWCR ReWind Card Reader
RWD ReWind Disk
RWE Run Without Error
RWF Read Wrong File
RWT Read/Write while stretching Tape
SA Store Anywhere
SAD Search And Destroy
SAI Skip All Instructions
SAK Snooze At Keyboard
SAS Show Appendix Scar
SAS Sit And Spin
SBE Swap Bits Erratically
SBF Skip on Bitbucket Full
SC Scramble Channels
SC Shred Cards
SCB Spindle Card and Belch
SCCA Short Circuit on Correct Answer
SCD Shuffle and Cut Dec
SCH Slit Cards Horizontal
SCI Shred Cards Immediate
SCM Set for Crash Mode
SCOM Set Cobol-Only Mode
SCP SCatter Printer
SCRRC SCRamble Register Contents
SCST Switch Channel to Star Trek
SCTR Stick Card To Reader
SD Scramble Directory
SD Slip Disk
SDC Spool Disk to Console
SDD Seek and Destroy Data
SDD Spin Disc Dry
SDDB Snap Disk Drive Belt
SDE Solve Differential Equations
SDI Self Destruct Immediate
SDM Search and Destroy Memory
SDR Slam Down Rondo [worst soda ever made]
SEB Stop Eating and Burp
SEOB Set Every Other Bit
SESUR Sing Elvis Songs Until he Returns
SEX Set EXecution register
SEX Sign EXtend
SFH Set Flags to Half-mast
SFP Send For Pizza
SFR Send For Reinforcements
SFT Stall For Time
SFTT Strip Form Tractor Teeth
SHAB SHift A Bit
SHABM SHift A Bit More
SHB Stop and Hang Bus
SHCD SHuffle Card Deck
SHIT Stop Here If Thursday
SHON Simulate HONeywell CPU [permanent no-op]
SHR SHift Random
SHRC SHRed Card
SHRT SHRed Tape
SID Switch to Infinite Density
SIP Store Indefinite Precision
SJV Scramble Jump Vectors
SLP Sharpen Light Pen
SMC Scramble Memory Contents
SMD Spontaneous Memory Dump
SMR Skip on Meaningless Result
SMS Shred Mylar Surface
SNAFU System Needs A Fuck-Up
SNARF System Normalize And Reset Flags
SNM Show No Mercy
SNO Send Nukes on Overflow
SOAWP SOlve All the World'd Problems
SOB Shit On Byte
SOB Stew On Brew
SOD Surrender Or Die
SOI Screw O'coin Intentional [personal one]
SOL Shift On Low
SOL Shit Out of Luck
SOP Stop and Order Pizza
SOS Sign Off, Stupid
SOT Sit On a Tack
SP Scatter Print
SPA Sliding Point Arithmetic
SPB Simulate Peanut Butter
SPD SPin Disc
SPS Set Panel Switches
SPSW Scramble Program Status Word
SQPWYC Sit Quietly and Play With Your Crayons
SRBO Set Random Bits to Ones
SRBZ Set Random Bits to Zeroes
SRC Select Random Channel
SRC Select Reader and Chew cards
SRCC Select Reader and Chew Cards
SRD Switch to Random Density
SRDR Shift Right Double Ridiculous
SRO Sort with Random Ordering
SROS Store in Read-Only Storage
SRR Shift Registers Random
SRSD Seek Record and Scar Disk
SRSD Seek Record and Scratch Disk
SRTC Stop Real-Time Clock
SRU Signoff Random User
SRZ Subtract & Reset to Zero
SRZ Subtract and Reset to Zero
SSB Scramble Status Byte
SSD Scratch System Disk
SSD Stacker Select Disk
SSD Stop and Scratch Disk [3815]
SSJ Select Stacker & Jam
SSJ Select Stacker and Jam
SSJP Select Stacker and JumP
SSM Solve by Supernatural Means
SSM Stacker Select Memory
SSP Seek SPindle
SSP Smoke and SPark
SST Seek and Stretch Tape
SSW Scramble Status Word
ST Set and Test
STA STore Anywhere
STC Slow To a Crawl
STD Stop, Take Drugs
STM STretch Magtape
STM Skip on Third Monday
STO Strangle Tape Operator
STPR SToP Rain
STRIKE STRIKE for more pay, better hours, etc.
STROM STore in Read-Only Memory
STTHB Set Terminal to Three Hundred Baud
SUIQ Subtract User's IQ
SUME SUprise ME
SUP Shred User Printout
SUP Solve Unsolvable Problem
SUR Screw Up Royally
SUS Stop Until Spring
SUS Subtract Until Senseless
SWAT SWAp Terminals
SWN SWap Nibbles
SWOS Store in Write-Only Storage
SWS Sort to Wrong Slots
SWT Select Wrong Terminal
SWU Select Wrong Unit
SWZN Skip Whether Zero or Not
SZD Switch to Zero Density
TAH Take A Hike
TAI Trap Absurd Inputs
TARC Take Arithmetic Review Course
TBFTG Two Burgers and Fries To Go
TC Transmit Colors
TDB Transfer and Drop Bits
TDRB Test and Destroy Random Bits
TDS Trash Data Segment
TET Triple Execution Time [SUN]
TLNF Teach me a Lesson i'll Never Forget
TLO Turn indicator Lights Off
TLW Transfer and Lose Way
TN Take a Nap
TOAC Turn Off Air Conditioner
TOG Take Out Garbage
TOG Time Out, Graduate
TOH Take Operator Hostage
TOO Turn On/off Operator
TOP Trap OPerator
TOS Trash Operating System
TOW Take Over World
TPD Terminal Printer Destruct
TPD Total Program Diagnostic
TPD Triple Pack Decimal
TPDH Tell Programmer to Do it Himself
TPF Turn Power oFf
TPN Turn Power oN
TPO Turn Power Off
TPR Tear PapeR
TR Turn into Rubbish
TRA Te Rdls Arvs [type ridiculous abbreviations]
TRD TRansfer and Drop bit
TSH Trap Secretary and Halt
TSM Trap Secretary and Mount
TST Trash System Tracks
TT%CN TeleType \(em Clunk Noise
TT%EKB TeleType \(em Electrify KeyBoard
TTA Try, Try Again
TTIHLIC Try To Imagine How Little I Care
TTITT Turn 2400 foot Tape Into Two 1200 foot Tapes
TTL Tap Trunk Line
TTL Time To Logoff
TYF Trust Your Feelings
UA Unload Accumulator
UAI Use Alternate Instruction set
UAPA(AM) Use All Power Available (And More)
UCB Uncouple CPU and Branch
UCIP Update Card In Place
UCK Unlock Console Keyswitch
UCLB Uncouple Comm Lines & Branch
UCPUB Uncouple CPUs and Branch
UDR Update and Delete Record
UER Update and Erase Record
UFO Unidentified Flag Operation
ULDA UnLoaD Accumulator
UMR Unlock Machine Room
UNPD UNPlug and Dump
UOP Useless OPeration
UP Understand Program[mer]
UPA Use all Power Available
UPC Understand Program[mer]'s Comments
UPI Undo Previous Instruction
URB Update, Resume and Branch
UTF Unwind Tape onto Floor
UTF Use The Force
UUBR Use Undefined Base Register
VAX Violate All eXecutions
VFE Violate Field Engineer
VFO Violate Female Operator
VMA Violate Maintenance Agreement
VNO Violate Noise Ordinance
VPA Vanishing Point Arithmetic
VVM Vaporize Virtual Memory
WAD Walk Away in Disgust
WAT WAste Time
WBB Write to the Bit Bucket
WBT Water Binary Tree
WC Waste Core
WCR Write to Card Reader
WDR Warp disk DRive
WED Write and Erase Data
WEMG Write Eighteen Minute Gap
WF Wait Forever
WGPB Write Garbage in Process-control Block
WHFO Wait until Hell Freezes Over
WHP Wave Hands over Program
WI Why Immediate
WI Write Illegibly
WID Write Invalid Data
WMC Write Millions of Comments
WNAM We Need A Miracle
WNHR Write New Hit Record
WNR Write Noise Record
WP Write Poop
WPET Write Past End of Tape
WPM Write Programmer's Mind
WSE Write Stack Everywhere
WSWW Work in Strange and Wonderous Ways
WSWW Work in Strange and Wondrous Ways
WUPO Wad Up Printer Output
WWLR Write Wrong Length Record
WWR Write Wrong Record
XXIO eXecute Invalid Opcode
XXKF eXecute Kermit the Frog
XXM eXclusive Maybe
XXMB eXclusive MayBe
XXOH eXecute no-Op and Hang
XXOR eXecute OpeRator
XXOS eXchange Operator's Sex
XXPR eXecute PRogrammer
XXPSW eXecute Program Status Word
XXSP eXecute Systems Programmer
XXVF eXchange Virtue for Fun
YAB Yet Another Bug
YASE Yet Another Stupid Error
ZAP Zero and Add Packed
ZAR Zero Any Register
ZD Zap Directory
ZEOW Zero Every Other Word
ZPI ZaP Immediate
SHAR_EOF
chmod 0600 opcodes ||
echo 'restore of opcodes failed'
Wc_c="`wc -c < 'opcodes'`"
test 30154 -eq "$Wc_c" ||
echo 'opcodes: original size 30154, current size' "$Wc_c"
fi
# ============= mkman ==============
if test -f 'mkman' -a X"$1" != X"-c"; then
echo 'x - skipping mkman (File already exists)'
else
echo 'x - extracting mkman (Text)'
sed 's/^X//' << 'SHAR_EOF' > 'mkman' &&
#!/bin/sh
#-------
# Read the opcodes file on stdin, write man page on stdout.
#-------
X
cat <<\!BEG!
.TH OPCODES 7
.SH NAME
opcodes \- assembler opcodes that ought to exist
.\" .SH SYNOPSIS
.SH DESCRIPTION
.\"-------
.\" Tt - max width of tag
.\" Tw - max width of tag + spacing to the paragraph
.\" .Op name desc
.\" Prints the given tag with the given description.
.\"-------
.nr Tt \w'RRSGWSSNK'
.nr Tw \w'RRSGWSSNK\0\0\0'
.de Op
.TP \n(Twu
.B \\$1
\\$2
..
.PP
This man page lists various assembly language opcodes that
many people have either suspected existed (in their nightmares)
or wished existed (in their dreams).
.PP
.PD 0
!BEG!
X
sed 's/^$.*$ $.*$$/.Op "\1" "\2"/' ${1+"$@"}
X
cat <<\!END!
.PD
.SH AUTHOR
Man page by
DaviD W. Sanderson (dws\|@cs.wisc.edu)
.SH COPYRIGHT
\&
.br
This collection is
.if n (C)
.if t \s+8\v'+2p'\fB\(co\fR\v'-2p'\s0
\s+2Copyright 1992 by DaviD W. Sanderson\s0
(but freely redistributable)
!END!
X
Xexit 0
SHAR_EOF
chmod 0700 mkman ||
echo 'restore of mkman failed'
Wc_c="`wc -c < 'mkman'`"
test 946 -eq "$Wc_c" ||
echo 'mkman: original size 946, current size' "$Wc_c"
fi
exit 0

--
DaviD W. Sanderson (***@cs.wisc.edu)
--
/~\ ***@kltpzyxm.invalid (Charlie Gibbs)
\ / I'm really at ac.dekanfrus if you read it the right way.
X Top-posted messages will probably be ignored. See RFC1855.
/ \ HTML will DEFINITELY be ignored. Join the ASCII ribbon campaign!

Peter Flass

2012-12-03 12:36:14 UTC

Post by Walter Banks
The "Halt & Catch Fire" term originated when Gerry Wheeler
fully mapped out the Motorola 6800 implemented instruction set

I was familiar with HCF on joke instruction mnemonic lists before
the first microprocessor was invented.

I believe you and Charlie are correct. I remember an IBM
Appendix F Overextended Mnemonics that was circulating. I just
did a quick search and saw lots of references but no original
documents.

Oh, yes and Double Pack Decimal -- DPD?

Make that Triple Pack Decimal. Here's the largest of the
lists I've corrected...
Wed Apr 15 23:04:40 1992
Message : #3192287 From: DaviD W. Sanderson
Group : NETCOMP.FolkLore
Length : 5645 words
Subject : canonical opcode list (LONG!)
Posted: 16 Apr 92 03:57:30 GMT
Org. : UW-Madison Computer Sciences Department
It's been a while since I last posted this.
Here's my canonical alphabetized list of assembler opcodes that really
ought to exist somewhere. It is the combination of all the lists of
such opcodes I have seen. (My thanks to all who have contributed to
this list.) I welcome any new opcodes you may wish to contribute!
The shar also includes a script which, when fed the opcodes file,
produces a corresponding regular nroff man page.

[snip]

Someone should design an architecture around these.

--
Pete

Charlie Gibbs

2012-12-03 15:58:56 UTC

Post by Peter Flass
Someone should design an architecture around these.

The x86 comes close...

Charles Richmond

2012-12-03 12:35:15 UTC

Post by Walter Banks
The "Halt & Catch Fire" term originated when Gerry Wheeler
fully mapped out the Motorola 6800 implemented instruction set

I was familiar with HCF on joke instruction mnemonic lists before
the first microprocessor was invented.

I believe you and Charlie are correct. I remember an IBM
Appendix F Overextended Mnemonics that was circulating. I just
did a quick search and saw lots of references but no original
documents.

Oh, yes and Double Pack Decimal -- DPD?

Make that Triple Pack Decimal. Here's the largest of the
lists I've corrected...

[[[... long list of faux mnemonics omitted ...]]]

Before leaving this topic, we should mention the *real* assembler mnemonics
for *real* computers... that are on the unusual side:

The SEX instruction is "sign extend" for the Motorola 6809 (and perhaps the
HC-11 chips too).

The SOB instruction is "subtract one and branch" for some models of the
PDP-11.

The EIEIO instruction is "enforced in-order execution of i/o" for the Power
PC chips. Presumably the Power PC is executing this instruction on the
surface of Mars even as we read/post <a.f.c.> messages.

That's all that comes to my mind right now... please add more.

--

numerist at aquaporin4 dot com

Ahem A Rivet's Shot

2012-12-03 16:17:28 UTC

On Mon, 3 Dec 2012 06:35:15 -0600

Post by Charles Richmond
[[[... long list of faux mnemonics omitted ...]]]
Before leaving this topic, we should mention the *real* assembler
The SEX instruction is "sign extend" for the Motorola 6809 (and perhaps
the HC-11 chips too).
The SOB instruction is "subtract one and branch" for some models of the
PDP-11.
The EIEIO instruction is "enforced in-order execution of i/o" for the
Power PC chips. Presumably the Power PC is executing this instruction
on the surface of Mars even as we read/post <a.f.c.> messages.
That's all that comes to my mind right now... please add more.

ABCD - Add Binary Coded Decimal - 68000

--
Steve O'Hara-Smith | Directable Mirror Arrays
C:>WIN | A better way to focus the sun
The computer obeys and wins. | licences available see
You lose and Bill collects. | http://www.sohara.org/

Bill Marcum

2012-12-04 02:49:20 UTC

Post by Charles Richmond
Before leaving this topic, we should mention the *real* assembler
The SEX instruction is "sign extend" for the Motorola 6809 (and perhaps
the HC-11 chips too).
The SOB instruction is "subtract one and branch" for some models of the
PDP-11.
The EIEIO instruction is "enforced in-order execution of i/o" for the
Power PC chips. Presumably the Power PC is executing this instruction
on the surface of Mars even as we read/post <a.f.c.> messages.
That's all that comes to my mind right now... please add more.

On the CDP1802, SEX is Set X, which sets a 4 bit register to choose a 16
bit pointer for use by other instructions.
The TI 9900 has an instruction BLWP (Branch and Link Workspace Pointer),
which could be read as "BLoWuP."

Charlie Gibbs

2012-12-05 02:34:47 UTC

Post by Bill Marcum
On the CDP1802, SEX is Set X, which sets a 4 bit register to choose
a 16 bit pointer for use by other instructions.
The TI 9900 has an instruction BLWP (Branch and Link Workspace
Pointer), which could be read as "BLoWuP."

Sometimes I'll pronounce HTML as if I'm clearing my throat.

Companies who play cute tricks with spelling and/or punctuation
get all they deserve. Pronouncing SQL*Forms as "squeal splat forms"
sounds appropriately violent.

Ahem A Rivet's Shot

2012-12-05 06:35:19 UTC

On 04 Dec 12 18:34:47 -0800

Sometimes I'll pronounce HTML as if I'm clearing my throat.

I've heard it pronounced "hurt 'em all".

--
Steve O'Hara-Smith | Directable Mirror Arrays
C:>WIN | A better way to focus the sun
The computer obeys and wins. | licences available see
You lose and Bill collects. | http://www.sohara.org/

jmfbahciv

2012-12-05 13:56:35 UTC

Post by Ahem A Rivet's Shot
On 04 Dec 12 18:34:47 -0800

Sometimes I'll pronounce HTML as if I'm clearing my throat.

I've heard it pronounced "hurt 'em all".

I've been pronouncing it as "hit em ell".

/BAH

Tonton Th

2012-12-06 08:17:23 UTC

/BAH

Branch and Always (Halt and Catch Fire) ?

--
Nous vivons dans un monde étrange/
http://foo.bar.quux.over-blog.com/

jmfbahciv

2012-12-06 14:19:45 UTC

Post by Tonton Th

/BAH

Branch and Always (Halt and Catch Fire) ?

Nope. If one was named after my initials, it would
be Branch After Halt.

/BAH

Charles Richmond

2012-12-06 00:47:34 UTC

Sometimes I'll pronounce HTML as if I'm clearing my throat.
Companies who play cute tricks with spelling and/or punctuation
get all they deserve. Pronouncing SQL*Forms as "squeal splat forms"
sounds appropriately violent.

Charlie, I know it takes... some.... people........ longer.... to....
under........ stand; but it just came to me today:

Mi$uck must have gotten the name "hotmail"... from jamming a few vowels into
"HTML".

--

numerist at aquaporin4 dot com

Michael Black

2012-12-06 03:22:17 UTC

Sometimes I'll pronounce HTML as if I'm clearing my throat.
Companies who play cute tricks with spelling and/or punctuation
get all they deserve. Pronouncing SQL*Forms as "squeal splat forms"
sounds appropriately violent.

Charlie, I know it takes... some.... people........ longer.... to....
Mi$uck must have gotten the name "hotmail"... from jamming a few vowels into
"HTML".

I think that's a leap. I never thought of that before.

Michael

g***@mail.com

2012-12-06 13:58:00 UTC

Sometimes I'll pronounce HTML as if I'm clearing my throat.
Companies who play cute tricks with spelling and/or punctuation
get all they deserve. Pronouncing SQL*Forms as "squeal splat forms"
sounds appropriately violent.

Charlie, I know it takes... some.... people........ longer.... to....
Mi$uck must have gotten the name "hotmail"... from jamming a few vowels into
"HTML".

I think that's a leap. I never thought of that before.
Michael

as in Unix 'ls' and 'rm' (among others), vowels removed. common Semitic usage.
(In Unix, save a bit of memory)?

--
maus
.
.
...

Ahem A Rivet's Shot

2012-12-06 14:25:44 UTC

On 6 Dec 2012 13:58:00 GMT

Post by g***@mail.com
as in Unix 'ls' and 'rm' (among others), vowels removed. common Semitic
usage. (In Unix, save a bit of memory)?

Typing time on slow terminals too.

--
Steve O'Hara-Smith | Directable Mirror Arrays
C:>WIN | A better way to focus the sun
The computer obeys and wins. | licences available see
You lose and Bill collects. | http://www.sohara.org/

Charles Richmond

2012-12-06 15:02:25 UTC

Post by g***@mail.com

Sometimes I'll pronounce HTML as if I'm clearing my throat.
Companies who play cute tricks with spelling and/or punctuation
get all they deserve. Pronouncing SQL*Forms as "squeal splat forms"
sounds appropriately violent.

Charlie, I know it takes... some.... people........ longer.... to....
Mi$uck must have gotten the name "hotmail"... from jamming a few vowels into
"HTML".

I think that's a leap. I never thought of that before.
Michael

as in Unix 'ls' and 'rm' (among others), vowels removed. common Semitic usage.
(In Unix, save a bit of memory)?

In UNIX, ISTM that the two and three letter commands... were to save typing.
Remember that *not* everyone in the old days could "touch type"... a skill
that today must be mastered at least by the time you are in the 4th grade.
For the "hunt and peck" folks, two letters were faster to type.

--

numerist at aquaporin4 dot com

Ahem A Rivet's Shot

2012-12-06 05:54:02 UTC

On Wed, 5 Dec 2012 18:47:34 -0600

Post by Charles Richmond
Mi$uck must have gotten the name "hotmail"... from jamming a few vowels
into "HTML".

Perhaps that's how the name was formed, but MS didn't name it, it
was already called hotmael when they bought it.

--
Steve O'Hara-Smith | Directable Mirror Arrays
C:>WIN | A better way to focus the sun
The computer obeys and wins. | licences available see
You lose and Bill collects. | http://www.sohara.org/

Charles Richmond

2012-12-06 15:03:55 UTC

Post by Ahem A Rivet's Shot
On Wed, 5 Dec 2012 18:47:34 -0600

Post by Charles Richmond
Mi$uck must have gotten the name "hotmail"... from jamming a few vowels
into "HTML".

Perhaps that's how the name was formed, but MS didn't name it, it
was already called hotmael when they bought it.

Oh, yeah... I forgot for a moment. Mi$uck's "innovative strategy" is let
someone else develop something, and then buy or steal it.

--

numerist at aquaporin4 dot com

Jean-Marc Bourguet

2012-12-03 15:22:57 UTC

Post by Charlie Gibbs
RMM Read Manager's Mind
ROM Read Operator's Mind
RPM Read Programmer's Mind

The set seems incomplete without

RUM Read User's Mind

Yours,

--
Jean-Marc

Walter Bushell

2012-12-03 19:15:19 UTC

Post by Charlie Gibbs
RMM Read Manager's Mind
ROM Read Operator's Mind
RPM Read Programmer's Mind

The set seems incomplete without
RUM Read User's Mind
Yours,

And the all important DWMBW -- Do what my Boss wants.

--
This space unintentionally left blank.

h***@bbs.cpcn.com

2012-12-01 01:30:32 UTC

Post by Walter Banks
The "Halt & Catch Fire" term originated when Gerry Wheeler
fully mapped out the Motorola 6800 implemented instruction set
and discovered some very useful but undocumented instructions. . . .

Didn't Motorola publish a "Principle of Operations" with their chip
describing all instructions?

Did the System/360 or successors have any undocumented instructions?

Walter Banks

2012-12-01 13:49:26 UTC

Didn't Motorola publish a "Principle of Operations" with their chip
describing all instructions?

Unfortunately no.

Gerry was tracking down a problem he was having with his
SW Tech 6800 based computer suddenly stopping and the
address bus cycling. This led to the discovery of opcode
0xDD from there he was curious about the remaining opcode
holes and discovered 9D did the same thing.

A more detailed look at the rest of the opcode holes discovered
one instruction that was likely just plain undocumented
It anded the accumulators.

He found store immediate instructions in the opcode holes
where they might be expected.

w..

Michael Black

2012-12-01 16:31:01 UTC

Didn't Motorola publish a "Principle of Operations" with their chip
describing all instructions?

I don't remember about the 6800, but I remember a table for at least one=20
CPU, I think the 6502, where the unused op-codes were labelled "reserved".
This may have been common.

The idea being that just as with mainframe or mini computers, someone=20
might find an op-code that did something useful. If people started using=
=20
it, then there might be an issue if the design changed and the op-code=20
went away. Usually the "unofficial op-codes" were an accident of=20
decoding, and it might go away.

Or in the case of the 6502, some op-codes were added later when the CMOS=20
version was released. And the Commodore 64 used the 6510, which was a=20
6502 with I/O built in, and some op-codes for dealing with that I/O.

If someone had found a "useful" op-code that wasn't documented, and it=20
caught on, the CPU company might find it unable to use that op-code for=20
something it planned.

Nevertheless, in the early days it was common for people to try to find
undocumented op-codes. Most of the time, it was for the sake of doing it,=
=20
and usually, nothing much came from it. They'd find other op-codes that=20
would do the same thing as existing op-codes, or they'd find one that did=
=20
something odd, a combination of some op-codes perhaps, but which wasn't=20
too practical in the end. I seem to recall one CPU, someone did come up=20
with something useful, but I can't remember.

Post by h***@bbs.cpcn.com
Did the System/360 or successors have any undocumented instructions? >

I thought that was the mainframe that had some useful undcomunented=20
op-cedes. There was definitely one that someone had found one or two on,=
=20
and it was useful, so the "bug" had to remian. Or maybe it was that=20
someone designed a clone of the 360 and had to copy the bug too?

The fact that such things had been found on a mainframe (and I don't know=
=20
if that was acceident or a deliberate search) caused people to look when=20
the microprocessors came along.

Michael

Ahem A Rivet's Shot

2012-12-01 17:09:17 UTC

On Sat, 1 Dec 2012 11:31:01 -0500

Didn't Motorola publish a "Principle of Operations" with their chip
describing all instructions?

I don't remember about the 6800, but I remember a table for at least one
CPU, I think the 6502, where the unused op-codes were labelled "reserved".
This may have been common.

I do recall seeing that in microprocessor data sheets in the late
70s, early 80s timeframe. Most manufacturers would happily send out a set
of data sheets on request, even to spotty students.

I also recall a period when there were 8080 copies that were full
re-implemntations rather than using Intel's masks (or copies made with an
SEM). They got noticed because the timings of some instructions differed.

--
Steve O'Hara-Smith | Directable Mirror Arrays
C:>WIN | A better way to focus the sun
The computer obeys and wins. | licences available see
You lose and Bill collects. | http://www.sohara.org/

Shmuel (Seymour J.) Metz

2012-12-02 01:43:10 UTC

Post by Ahem A Rivet's Shot
I also recall a period when there were 8080 copies that were full
re-implemntations rather than using Intel's masks (or copies made
with an SEM).

Are you thinking of the Z-80? I believe that was an extension of the
8080 rather than a simple clone.

Ahem A Rivet's Shot

2012-12-02 13:47:54 UTC

On Sat, 01 Dec 2012 20:43:10 -0500

Post by Ahem A Rivet's Shot
I also recall a period when there were 8080 copies that were full
re-implemntations rather than using Intel's masks (or copies made
with an SEM).

Are you thinking of the Z-80? I believe that was an extension of the
8080 rather than a simple clone.

Certainly not, I spent quite a time programming Z80s and building
them into machines (starting with the Totch model C). The Z80 was made by
Zilog and was a deliberate enhancement of the Z80 done by some of the
original 8080 designers. They sacrificed some of the clean architecture of
the 8080 to add some very useful instructions (mostly delaing with register
pairs). It was a clear triumph of pragmatism over elegance.

The devices in question were 8080s with no extra instructions and no
indication that they differed in any way from the Intel made ones, until
you found out the hard way that the timings weren't what you expected.
There were also non Intel 8080s made by manufacturers who licensed the
masks, and rumour has it some made by manufacturers who reverse engineered
the masks with the aid of an SEM.

--
Steve O'Hara-Smith | Directable Mirror Arrays
C:>WIN | A better way to focus the sun
The computer obeys and wins. | licences available see
You lose and Bill collects. | http://www.sohara.org/

Walter Bushell

2012-12-02 14:25:10 UTC

Post by Ahem A Rivet's Shot
I also recall a period when there were 8080 copies that were full
re-implemntations rather than using Intel's masks (or copies made
with an SEM).

Are you thinking of the Z-80? I believe that was an extension of the
8080 rather than a simple clone.

Yes, the Z80 had an index register, sort of. It was implemented as
memory location 0 and hence slowed the operations using it.

--
This space unintentionally left blank.

Ahem A Rivet's Shot

2012-12-02 15:01:19 UTC

On Sun, 02 Dec 2012 09:25:10 -0500

Post by Shmuel (Seymour J.) Metz
Are you thinking of the Z-80? I believe that was an extension of the
8080 rather than a simple clone.

Yes, the Z80 had an index register, sort of. It was implemented as
memory location 0 and hence slowed the operations using it.

Erm, in a word. No. You may be thinking of the 6502 which could
use one byte addressing for the first 256 bytes, or perhaps the 9900 with
it's memory based workspace. But the Z80 had proper registers, all the
registers of the 8080, plus two index registers IX and IY along with a
duplicate set of the 8080 registers (the shadow set) which could be used
for fast context switches. What made using IX and IY slower than using the
8080 registers was the two byte instruction codes used to access them
instead of the one byte codes used for the 8080 compatible instructions (an
unused 8080 instruction was used as the leader to introduce the extra
instructions).

--
Steve O'Hara-Smith | Directable Mirror Arrays
C:>WIN | A better way to focus the sun
The computer obeys and wins. | licences available see
You lose and Bill collects. | http://www.sohara.org/

Michael Black

2012-12-02 17:24:31 UTC

Post by Walter Bushell
Yes, the Z80 had an index register, sort of. It was implemented as
memory location 0 and hence slowed the operations using it.

Since they wanted the Z80 to be compatible with the 8080, they had no
choice but to tack the extra instructions on that way.

The 6809 was similar, in that in some cases a precode was needed (what did
they call it?). But, since the 6809 was not meant to be compatible with
anything, they started from scratch and could place arrange the opcodes as
they saw fit. So presumably the extra precode was in the ones that they
expected to see less use.

Michael

Peter Flass

2012-12-03 12:32:04 UTC

Post by Walter Bushell
Yes, the Z80 had an index register, sort of. It was implemented as
memory location 0 and hence slowed the operations using it.

Erm, in a word. No. You may be thinking of the 6502 which could
use one byte addressing for the first 256 bytes, or perhaps the 9900 with
it's memory based workspace. But the Z80 had proper registers, all the
registers of the 8080, plus two index registers IX and IY along with a
duplicate set of the 8080 registers (the shadow set) which could be used
for fast context switches. What made using IX and IY slower than using the
8080 registers was the two byte instruction codes used to access them
instead of the one byte codes used for the 8080 compatible
instructions (an
unused 8080 instruction was used as the leader to introduce the extra
instructions).

Since they wanted the Z80 to be compatible with the 8080, they had no
choice but to tack the extra instructions on that way.
The 6809 was similar, in that in some cases a precode was needed (what
did they call it?). But, since the 6809 was not meant to be compatible
with anything, they started from scratch and could place arrange the
opcodes as they saw fit. So presumably the extra precode was in the
ones that they expected to see less use.
Michael

Didn't it sort of resemble the 6800?

--
Pete

Ahem A Rivet's Shot

2012-12-03 12:34:52 UTC

On Mon, 03 Dec 2012 07:32:04 -0500

Post by Peter Flass

Post by Michael Black
The 6809 was similar, in that in some cases a precode was needed (what
did they call it?). But, since the 6809 was not meant to be compatible
with anything, they started from scratch and could place arrange the
opcodes as they saw fit. So presumably the extra precode was in the
ones that they expected to see less use.
Michael

Didn't it sort of resemble the 6800?

There was certainly a family likeness. The Mototola rep who came to
CUPG to talk about the 6809, and actually spent much of the time talking
about the 68000 from slides marked Motorola Company Confidential, claimed
that the 6809 was practice for the 68000.

--
Steve O'Hara-Smith | Directable Mirror Arrays
C:>WIN | A better way to focus the sun
The computer obeys and wins. | licences available see
You lose and Bill collects. | http://www.sohara.org/

Michael Black

2012-12-03 13:52:33 UTC

Post by Peter Flass

Didn't it sort of resemble the 6800?

It had a resemblance, but they didn't feel obligated to make the 6809 a
superset of the 6800. They felt no need to keep the opcodes the same,
there was probably a similar set of registers in there that the 6800 had
(plus a lot more), but nobody was going around showing off how it was just
like the 6800 but with more registers. Bus wise it remained similar, so
all the existing Motorola I/O devices could be attached to the new CPU.

There was a three part article in Byte by the designers, in 1979 I think,
where they went into some of the effort they made before they started
designing it. They analyzed existing code to see what opcodes were used
(I remember one light analysis of the 6502 that indicated a handful of
opcodes were used most of the time, which I can believe, I hand assembled
when I was using the 6502 and could easily remember the hex values for the
common opcodes), and to see how they were used (to see if they was a
pattern of opcodes used as a sort of pseudo-op to make up a more
complicated instruction). But they were also trying for a CPU that was
good for high level language, which is where it really leapt ahead.

They had Microware come up with a BASIC for it, but they went further and
came up with an operating system. Everything was modularized, a header at
the top of each program, the code in one area, the data in another, and
every program had to be relocatable and reusable. The ability to better
use stacks was useful and was due to the latter.

Unfortunately, it came late, and what could have been an improvement
to the 8-bit world meant little since people were moving to 16bit, if for
no other reason than they could have more memory.

And then the 68000 was not an extension of the 6809. It actually looked
"foreing" in terms of architecture, since it was more like a minicomputer
architecture than the 8bit microprocessors we were famaliar with.

Michael

Charlie Gibbs

2012-12-03 16:01:45 UTC

Post by Michael Black
And then the 68000 was not an extension of the 6809. It actually
looked "foreing" in terms of architecture, since it was more like
a minicomputer architecture than the 8bit microprocessors we were
famaliar with.

I have an early copy of the 68000 reference manual (thanks, Jim
Butterfield!), and on the cover it says, "Break away from the past."

Andrew Swallow

2012-12-03 17:46:36 UTC

I have an early copy of the 68000 reference manual (thanks, Jim
Butterfield!), and on the cover it says, "Break away from the past."

The mini-computer the 68000 reimplemented appears to be the PDP-11.

Andrew Swallow

William Hamblen

2012-12-05 22:16:06 UTC

Post by Andrew Swallow

I have an early copy of the 68000 reference manual (thanks, Jim
Butterfield!), and on the cover it says, "Break away from the past."

The mini-computer the 68000 reimplemented appears to be the PDP-11.
Andrew Swallow

I always thought that a 68000 was as if an IBM 360 mated with a DEC
PDP-11 and had puppies. The branch instructions on the 6800, 6809
and 68000 were PDP-11 like. The 68000 did have 16 32-bit registersr:
8 accumulators and 8 index registers, but not all general purpose.

Bud

Rod Speed

2012-12-06 00:43:28 UTC

Post by William Hamblen

Post by Andrew Swallow

I have an early copy of the 68000 reference manual (thanks, Jim
Butterfield!), and on the cover it says, "Break away from the past."

The mini-computer the 68000 reimplemented appears to be the PDP-11.
Andrew Swallow

I always thought that a 68000 was as if an IBM 360 mated with a DEC
PDP-11 and had puppies.

Dunno, there wasn't a lot that came from the 360.

Post by William Hamblen
The branch instructions on the 6800, 6809 and 68000 were PDP-11 like.
The 68000 did have 16 32-bit registersr: 8 accumulators and 8 index
registers, but not all general purpose.

Charles Richmond

2012-12-03 18:20:19 UTC

[snip...] [snip...]
[snip...]
And then the 68000 was not an extension of the 6809. It actually looked
"foreing" in terms of architecture, since it was more like a minicomputer
architecture than the 8bit microprocessors we were famaliar with.

Both the 6809 and the 68000 had instructions reminiscent of the PDP-11.
Some instructions had auto-increment and auto-decrement modes.

I'll guarantee this: The 68000 instruction set was *much* less baroque than
the x86 instruction set!!!

--

numerist at aquaporin4 dot com

Ahem A Rivet's Shot

2012-12-03 19:18:31 UTC

On Mon, 3 Dec 2012 12:20:19 -0600

Post by Charles Richmond
I'll guarantee this: The 68000 instruction set was *much* less baroque
than the x86 instruction set!!!

Is there any instruction set that is not much less baroque than
x86 ?

--
Steve O'Hara-Smith | Directable Mirror Arrays
C:>WIN | A better way to focus the sun
The computer obeys and wins. | licences available see
You lose and Bill collects. | http://www.sohara.org/

Shmuel (Seymour J.) Metz

2012-12-03 22:37:30 UTC

Post by Ahem A Rivet's Shot
Is there any instruction set that is not much less baroque than
x86 ?

UNIVAC 1005.

Peter Flass

2012-12-03 20:08:39 UTC

[snip...] [snip...] [snip...]
And then the 68000 was not an extension of the 6809. It actually
looked "foreing" in terms of architecture, since it was more like a
minicomputer
architecture than the 8bit microprocessors we were famaliar with.

Both the 6809 and the 68000 had instructions reminiscent of the PDP-11.
Some instructions had auto-increment and auto-decrement modes.
I'll guarantee this: The 68000 instruction set was *much* less baroque
than the x86 instruction set!!!

Actually I think the tense should be "is". Freescale (nee Motorola) is
still manufacturing, and presumably selling, them. The "Coldfire" is a
variant ok the 68K.

--
Pete

Charles Richmond

2012-12-03 13:05:30 UTC

Post by Walter Bushell
Yes, the Z80 had an index register, sort of. It was implemented as
memory location 0 and hence slowed the operations using it.

Since they wanted the Z80 to be compatible with the 8080, they had no
choice but to tack the extra instructions on that way.
The 6809 was similar, in that in some cases a precode was needed (what did
they call it?). But, since the 6809 was not meant to be compatible with
anything, they started from scratch and could place arrange the opcodes as
they saw fit. So presumably the extra precode was in the ones that they
expected to see less use.

The 6809 was a "spiffy" chip!!! At least part of the BYTE magazine article
describing the design of the 6809 can be found at:

http://tlindner.macmess.org/wp-content/uploads/2006/09/byte_6809_articles.pdf

--

numerist at aquaporin4 dot com

Michael Black

2012-12-03 13:56:56 UTC

Post by Michael Black
The 6809 was similar, in that in some cases a precode was needed (what did
they call it?). But, since the 6809 was not meant to be compatible with
anything, they started from scratch and could place arrange the opcodes as
they saw fit. So presumably the extra precode was in the ones that they
expected to see less use.

The 6809 was a "spiffy" chip!!! At least part of the BYTE magazine article
http://tlindner.macmess.org/wp-content/uploads/2006/09/byte_6809_articles.pdf

I just mentioned that article in another post, thanks for having the URL.

There was rumor or speculation that Mos Technology would come out with a
better 6502, so the magazines that dealt with that CPU ran speculative
articles about what it might include or what someone would like to see.

And then the 6809 came along, and that became the "upgrade" from the 6502.
So just like I was enticed to the 6502 by the article in Byte in the fall
of 1975 about the new cpu that cost only $20 in single quantities, I
suddenly was swayed towards the 5809, and when I moved from my OSI
Superboard to a better computer in 1984, it was to the 6809. It happend
to be the Radio Shack Color COmputer, because that's what I could afford,
but I picked it because of the 6809.

Michael

Charlie Gibbs

2012-12-03 16:03:10 UTC

Post by Michael Black
There was rumor or speculation that Mos Technology would come out
with a better 6502,

65816?

Michael Black

2012-12-03 17:12:53 UTC

Post by Michael Black
There was rumor or speculation that Mos Technology would come out
with a better 6502,

65816?

I'm not sure. I seem to recall someone writing aobut a "secret document",
but I'm not sure. So maybe there was some prelimary work at Mos
Technology for an upgrade, maybe not. And then yes, the 65816 came along
that ran 6502 code but could also be switched to a 16bit CPU. But of
course that came from someone else, not Mos Technology. I suddenly can't
remember the company, in part because it has a name like another company.

And then even when the 65816 came along, it as too late, everyone had
jumped to the 68000 or the 8086. The only commercial computer I remember
it being in was the Apple IIGS. I'm not sure where it went in embedded
controller market, yet word has it one can still buy them new.

Michael

Bill Marcum

2012-12-03 22:11:16 UTC

Post by Michael Black
There was rumor or speculation that Mos Technology would come out
with a better 6502,

65816?

Western Design Center. The 65816 was used in the Apple IIgs, and there
were upgrade kits for Commodore and Atari 8-bit machines, but I don't
think many of those kits were sold. I think some of the upgrades had a
higher clock speed than the original 65xx.

Post by Michael Black
And then even when the 65816 came along, it as too late, everyone had
jumped to the 68000 or the 8086. The only commercial computer I
remember it being in was the Apple IIGS. I'm not sure where it went in
embedded controller market, yet word has it one can still buy them new.
Michael

Michael Black

2012-12-04 19:03:33 UTC

Post by Michael Black
There was rumor or speculation that Mos Technology would come out
with a better 6502,

65816?

Western Design Center. The 65816 was used in the Apple IIgs, and there were
upgrade kits for Commodore and Atari 8-bit machines, but I don't think many
of those kits were sold. I think some of the upgrades had a higher clock
speed than the original 65xx.

Yes. And now I remember why I was hesitant to provide a name of the
company, there was also Western Digital (WDC) that made a lot of floppy
disc controllers.

There was a 65816 with an external 8bit bus, the 65808?, and wasn't it
plug in compatible with the 6502? You got the 16 bit CPU but not the
extra address lines. If it was pint compatible, it was easy to add, but
then you had to deal wtih no monitor and lack of software for the 16bit
CPU.

The IIGS of course was designed for the CPU so it had more RAM onboard and
a monitor for using the 16bit side.

Michael

Charles Richmond

2012-12-03 18:16:34 UTC

Post by Michael Black
There was rumor or speculation that Mos Technology would come out
with a better 6502,

65816?

The 65816 is in the Apple II GS, and it is a 16-bit chip. The Apple II GS
had a regular Apple II compatibility mode, where it was supposed to run
Apple II programs *just* like an Apple II. I think there was varying
success with this.

--

numerist at aquaporin4 dot com

Michael Black

2012-12-03 18:28:06 UTC

Post by Michael Black
There was rumor or speculation that Mos Technology would come out
with a better 6502,

65816?

The 65816 is in the Apple II GS, and it is a 16-bit chip. The Apple II GS
had a regular Apple II compatibility mode, where it was supposed to run Apple
II programs *just* like an Apple II. I think there was varying success with
this.

It ran like a 6502, until you switched it to the 16bit mode.

If there were problems, it was because of the extra hardware (the IIGS
included an Ensoniq synthesizer IC) and replaced the Apple II parallel
ASCII keyboard with an ADB keyboard like on the Mac Plus and later.

What I can't remember is whether the 65816 was a straight copy of the
6502, or if it included the handful of extra opcodes added to the 65C02.

Actually, there was an issue, there were two different CMOS versions of
the 6502, one had some extra opcodes, the other had extra or a differnet
set of extra opcodes.

Michael

Bill Marcum

2012-12-03 22:26:12 UTC

Post by Michael Black
Actually, there was an issue, there were two different CMOS versions of
the 6502, one had some extra opcodes, the other had extra or a differnet
set of extra opcodes.
Michael

The Apple iic (//c? IIc? ][c?) used a 65c02, not to be confused with the
6502C, used in some Atari computers, which was not a CMOS chip.

Michael Black

2012-12-04 19:06:54 UTC

Post by Bill Marcum

Post by Michael Black
Actually, there was an issue, there were two different CMOS versions of
the 6502, one had some extra opcodes, the other had extra or a differnet
set of extra opcodes.
Michael

The Apple iic (//c? IIc? ][c?) used a 65c02, not to be confused with the
6502C, used in some Atari computers, which was not a CMOS chip.

Yes, the "C" at the end was the speed, I guess for 3MHz clock? I seem to
recall the "B" was for 2MHz.

But no, there were two 65C02 CPUs, minor variations. Or maybe I am
misremembering, maybe it was that the 65C02 additions were not brought
into the 65816. That might be it. I can't remember.

Michael

Peter Flass

2012-12-03 19:57:11 UTC

Post by Walter Bushell
Yes, the Z80 had an index register, sort of. It was implemented as
memory location 0 and hence slowed the operations using it.

Erm, in a word. No. You may be thinking of the 6502 which could
use one byte addressing for the first 256 bytes, or perhaps the 9900 with
it's memory based workspace. But the Z80 had proper registers, all the
registers of the 8080, plus two index registers IX and IY along with a
duplicate set of the 8080 registers (the shadow set) which could be used
for fast context switches. What made using IX and IY slower than using the
8080 registers was the two byte instruction codes used to access them
instead of the one byte codes used for the 8080 compatible
instructions (an
unused 8080 instruction was used as the leader to introduce the extra
instructions).

Since they wanted the Z80 to be compatible with the 8080, they had no
choice but to tack the extra instructions on that way.
The 6809 was similar, in that in some cases a precode was needed (what
did they call it?). But, since the 6809 was not meant to be
compatible with anything, they started from scratch and could place
arrange the opcodes as they saw fit. So presumably the extra precode
was in the ones that they expected to see less use.

The 6809 was a "spiffy" chip!!!...

Agree. When I was young and crazy and thinking about building my own
single board computer I compared what was then available: 8080, z80,
6502, the RCA thingy, etc. and decided the 6809 was far and away the
best. Of course by the time I had gotten the money, bought all the
components, and assembled it The IBM PC was available, so when I
couldn't get it working after some experimentation I gave up and just
bought a PC clone.

--
Pete

William Hamblen

2012-12-04 02:36:26 UTC

Post by Walter Bushell
Yes, the Z80 had an index register, sort of. It was implemented as
memory location 0 and hence slowed the operations using it.

Since they wanted the Z80 to be compatible with the 8080, they had no
choice but to tack the extra instructions on that way.
The 6809 was similar, in that in some cases a precode was needed (what did
they call it?). But, since the 6809 was not meant to be compatible with
anything, they started from scratch and could place arrange the opcodes as
they saw fit. So presumably the extra precode was in the ones that they
expected to see less use.
Michael

The Motorola 6809 was sort of source compatible with the Motorola 6800
in that with some limitations you could feed a 6809 assembler 6800 source
and get a binary that would run on a 6809. I guess this is folkloric since
the 6809 came out thirty-something years ago.

Bud

Charles Richmond

2012-12-03 13:01:05 UTC

Post by Ahem A Rivet's Shot
I also recall a period when there were 8080 copies that were full
re-implemntations rather than using Intel's masks (or copies made
with an SEM).

Are you thinking of the Z-80? I believe that was an extension of the
8080 rather than a simple clone.

Yes, the Z80 had an index register, sort of. It was implemented as
memory location 0 and hence slowed the operations using it.

The Z-80 has *two* index registers. I was *not* aware that either used a
memory location.

--

numerist at aquaporin4 dot com

Ahem A Rivet's Shot

2012-12-03 13:49:59 UTC

On Mon, 3 Dec 2012 07:01:05 -0600

Post by Ahem A Rivet's Shot
I also recall a period when there were 8080 copies that were full
re-implemntations rather than using Intel's masks (or copies made
with an SEM).

Are you thinking of the Z-80? I believe that was an extension of the
8080 rather than a simple clone.

Yes, the Z80 had an index register, sort of. It was implemented as
memory location 0 and hence slowed the operations using it.

The Z-80 has *two* index registers. I was *not* aware that either used a
memory location.

They didn't.

--
Steve O'Hara-Smith | Directable Mirror Arrays
C:>WIN | A better way to focus the sun
The computer obeys and wins. | licences available see
You lose and Bill collects. | http://www.sohara.org/

Anne & Lynn Wheeler

2012-12-02 04:49:13 UTC

Post by Michael Black
I thought that was the mainframe that had some useful undcomunented
op-cedes. There was definitely one that someone had found one or two
on, and it was useful, so the "bug" had to remian. Or maybe it was
that someone designed a clone of the 360 and had to copy the bug too?
The fact that such things had been found on a mainframe (and I don't
know if that was acceident or a deliberate search) caused people to
look when the microprocessors came along.

things were fairly strict about all processors toeing the line ... there
was (privileged) "diagnose" instruction ... that required being in
supervisor state ... and was defined as processor specific ... lots of
microcode not part of 360/370 ... different microcode on different
models being selected by various diagnose parameters.

common was emulators ... which when activated might also activate new
instructions. recent post
http://www.garlic.com/~lynn/2011j.html#46 Suffix of 64 bit instsruction

... diagnose instruction displacement x"3cc" selects emulator function,
turning on/off special emulator instructions (x'99' opcode).

Getting into supervisor/privileged state and executing diagnose
instruction with all possible parameters ... might find all sorts of
model specific microprograms.

there are also "RPQ" instructions ... like the CPS (conversational
programming system) "assists" for 360/50 ... recent post
http://www.garlic.com/~lynn/2012n.html#26 Is there a correspondence between 64-bit IBM mainframes and PoOps editions levels?

above references description (on bitsavers) done by Allen-Babcock (under
contract to IBM) ... including a couple list search operations.

There was also a "search list" instruction "RPQ" done by Lincoln Labs
that was installed on some number of 360/67s (various releases of cp67
used the instruction ... and if it wasn't installed ... would simulate
its operation in software, first taking an invalid opcode program
exception)

leading up to virtual memory announcement for 370 ... the various 370
models had to develop retrofit hardware for 370s already in customer
shops. 370/165 was running into lots of trouble implementing the full
virtual memory architecture. after some delays, it was decided to
eliminate several features from full 370 virtual memory implementation
to buy six months on the schedule for retrofitting virtual memory
hardware to 370/165. This required that most of the other models that
had already implemented the full specification ... had to delete all the
features dropped for the 370/165. This also caused problems for various
software that had already done implementations assuming the full 370
virtual memory specification.

--
virtualization experience starting Jan1968, online at home since Mar1970

Shmuel (Seymour J.) Metz

2012-12-02 20:55:44 UTC

Post by Anne & Lynn Wheeler
leading up to virtual memory announcement for 370 ... the various 370
models had to develop retrofit hardware for 370s already in customer
shops.

Not the 3145; it just needed a new floppy. The description of the OS
DOS Compatibility feature in 3145 Processing Unit Theory -
Maintenance, SY24-3581-1, made it obvious that paging was coming.

h***@bbs.cpcn.com

2012-12-03 15:19:09 UTC

Post by Anne & Lynn Wheeler
things were fairly strict about all processors toeing the line ... there
was (privileged) "diagnose" instruction ... that required being in
supervisor state ... and was defined as processor specific ... lots of
microcode not part of 360/370 ... different microcode on different
models being selected by various diagnose parameters.

Would it be fair to say privileged instructions were normally only
accessed by IBM staff in developing the operating system? In order to
customers to access such instructions, wouldn't they effectively have
to write their own supervisor to handle the service calls? (I suppose
there were exceptions for very specific situations.)

Thanks.

Dan Espen

2012-12-03 16:13:53 UTC

Customer system programmers write various exits where they can gain
supervisor privileges and use privileged instructions.

Whether those activities cross the boundaries to "normally" it's hard to
say. In the environments I've seen, there are always some customer
exits active.

--
Dan Espen

Shmuel (Seymour J.) Metz

2012-12-03 22:39:27 UTC

Post by Dan Espen
Customer system programmers write various exits where they can
gain supervisor privileges and use privileged instructions.

Further, IBM documented them as available for customer use.

k***@cix.compulink.co.uk

2012-12-02 11:55:55 UTC

Post by Michael Black
I seem to recall one CPU, someone did come up
with something useful, but I can't remember.

Probably the Z80. IIRC that had several useful undocumented
instructions. Off course it turned out they were undocumented because
they could not be guaranteed to work on all chips.

Ken Young

Shmuel (Seymour J.) Metz

2012-12-02 01:41:29 UTC

In <***@darkstar.example.org>, on
12/01/2012

Post by h***@bbs.cpcn.com
Did the System/360 or successors have any undocumented instructions?

IBM had and still has what they call RPQ[1] features; those are not
documented in the Principles of Operation but they are documented in
the manuals for the features.

Post by Michael Black
I thought that was the mainframe that had some useful undcomunented
op-cedes.

None that I'm aware of, but see above. However, some IBM mainframes
prior to the S/360 had unintended behaviors that they later
documented, e.g., or'ing index registers on the 7090.

[1] Request Price Quotation.

Joe Morris

2012-12-02 13:41:53 UTC

Post by Michael Black
I thought that was the mainframe that had some useful undcomunented
op-cedes.

None that I'm aware of, but see above. However, some IBM mainframes
prior to the S/360 had unintended behaviors that they later
documented, e.g., or'ing index registers on the 7090.

Are you thinking of the 7090 behavior when you specify more than one index
register in an instruction? It wasn't in the user documentation I had (7090
or 704x), and it cost me mucho time back in the late 1960s when trying to
understand a matrix manipulation utility (uncommented source, of course)
program I was trying to convert from using row-wise descending (FMS) to
column-wise ascending (IBSYS) array storage. The or'ing of the values in
the registers to calculate the effective address was documented; what wasn't
documented was that the or'ed value was written back to all participating
index registers.

I learned about *that* behavior only a few years ago when a programmer wrote
(just for the helluvit) a simulator for the 7090 and had problems running
the original IBM diagnostics because he had implemented the behavior as
documented. He posted a query to alt.folklore.computers and the responses
were how I discovered why I hadn't been able to figure out the matrix
program's logic.

Joe

Shmuel (Seymour J.) Metz

2012-12-02 20:41:22 UTC

Post by Joe Morris
Are you thinking of the 7090 behavior when you specify more than
one index register in an instruction?

Yes.

Walter Bushell

2012-12-02 14:22:49 UTC

Post by Shmuel (Seymour J.) Metz
None that I'm aware of, but see above. However, some IBM mainframes
prior to the S/360 had unintended behaviors that they later
documented, e.g., or'ing index registers on the 7090.
[1] Request Price Quotation.

I talked to someone who programmed the IBM 709 and always referred to
the 7090 as the 709 O, said that the first reaction to the index
registers was 'What for', followed shortly by "Why only 3" as there
were 3 bits for indexing. The 7094 had 7 index registers, or 8 if you
included index register #0 which was always zero.
"

--
This space unintentionally left blank.

Joe Morris

2012-12-02 16:51:25 UTC

Post by Walter Bushell
I talked to someone who programmed the IBM 709 and always referred to
the 7090 as the 709 O, said that the first reaction to the index
registers was 'What for', followed shortly by "Why only 3" as there
were 3 bits for indexing. The 7094 had 7 index registers, or 8 if you
included index register #0 which was always zero.

Has anyone ever seen an explanation for *why* the 7090 used three bits for
the three index registers (one bit for each register) vs. two bits to select
one of them? One explanation I can think of that might explain it was that
the designers intended to have seven and there was a late decision that
three were enough (or maybe the architects were planning for the 7094?).
Another possible explanation that would support the "or'ing" of the
registers: the ability to use the registers to directly index into a 2D or
3D array, with the dimensions constrained to avoid address bit collisions.

Joe

h***@bbs.cpcn.com

2012-12-03 15:16:42 UTC

On Dec 1, 8:41 pm, Shmuel (Seymour J.) Metz

Post by Shmuel (Seymour J.) Metz
IBM had and still has what they call RPQ[1] features; those are not
documented in the Principles of Operation but they are documented in
the manuals for the features.

Could you give some examples of such RPQ instructions and the
applications for which they'd be used? Seems like it be would be a
very expensive option--to add a custom-made instruction for only one
customer.

Charlie Gibbs

2012-12-03 16:05:48 UTC

In article

Post by h***@bbs.cpcn.com
On Dec 1, 8:41 pm, Shmuel (Seymour J.) Metz

Somewhere in a box I have two descriptions of the SLT instruction.
One is pretty straightforward, while the other is tongue-in-cheek
and is subtitled "And You Thought BXLE Was Bad?"

Scott Lurndal

2012-12-03 17:11:00 UTC

Post by Charlie Gibbs
In article

Post by h***@bbs.cpcn.com
On Dec 1, 8:41 pm, Shmuel (Seymour J.) Metz

Somewhere in a box I have two descriptions of the SLT instruction.
One is pretty straightforward, while the other is tongue-in-cheek
and is subtitled "And You Thought BXLE Was Bad?"

Burroughs Medium Systems had a "SLT" instruction (Search Linked lisT). Would
search a linked list in memory for the specified key (both key and link could
be located anywhere within the 500KB maximum element size), and the search
condition could be one of:

key equal, key not equal, key less, key LEQ, key GTR, key GEQ, any bit
in key equal, no bit in key equal, highest value and lowest value.

<http://vseries.lurndal.org/doku.php?id=instructions:slt>

Internally, the politically incorrect nomenclature was to refer to the slut instruction.
The WHR (Write Hardware Register) instruction likewise had a politically incorrect
pronuciation.

scott

Shmuel (Seymour J.) Metz

2012-12-03 22:47:08 UTC

Post by Charlie Gibbs
In article

Post by h***@bbs.cpcn.com
Could you give some examples of such RPQ instructions and the
applications for which they'd be used?

Originally an RPQ instruction, 'E8'X was intended for text processing
in Semitic languages and is now standard:

MOVE INVERSE

MVCIN D (L,B ),D (B ) [SS]

Post by h***@bbs.cpcn.com
Seems like it be would be a very expensive option--to add a
custom-made instruction for only one customer.

The cost varies depending on the technology, and it is not always just
one customer.

Peter Flass

2012-12-03 20:02:35 UTC

On Dec 1, 8:41 pm, Shmuel (Seymour J.) Metz

Probably microcoded. Allen-Babcock's Conversational Programming System
(CPS) had special microcode for, IIRC, a 360/40. One instruction
evaluated an expression in one instruction.

http://bitsavers.informatik.uni-stuttgart.de/pdf/allen-babcock/cps/

--
Pete

Shmuel (Seymour J.) Metz

2012-12-03 22:48:08 UTC

Post by Peter Flass
Probably microcoded. Allen-Babcock's Conversational Programming
System (CPS) had special microcode for, IIRC, a 360/40.

My recollection is 360/50.

jmfbahciv

2012-12-04 12:19:17 UTC

Post by Charlie Gibbs
RMM Read Manager's Mind
ROM Read Operator's Mind
RPM Read Programmer's Mind

The set seems incomplete without
RUM Read User's Mind
Yours,

And the all important DWMBW -- Do what my Boss wants.

Which wans't used. Instead, DWMBRW had to be done --
Do what my boss really wants.

/BAH

Charlie Gibbs

2012-12-05 02:29:03 UTC

Post by Charlie Gibbs
RMM Read Manager's Mind
ROM Read Operator's Mind
RPM Read Programmer's Mind

The set seems incomplete without
RUM Read User's Mind
Yours,

And the all important DWMBW -- Do what my Boss wants.

Which wans't used. Instead, DWMBRW had to be done --
Do what my boss really wants.

How long would it take for your boss to realize the difference?
And how much hell did you catch in the meantime?

jmfbahciv

2012-12-05 13:56:36 UTC

Post by Charlie Gibbs
RMM Read Manager's Mind
ROM Read Operator's Mind
RPM Read Programmer's Mind

The set seems incomplete without
RUM Read User's Mind
Yours,

And the all important DWMBW -- Do what my Boss wants.

Which wans't used. Instead, DWMBRW had to be done --
Do what my boss really wants.

How long would it take for your boss to realize the difference?

Zero. He got what he wanted.

Post by Charlie Gibbs
And how much hell did you catch in the meantime?

It depended on the boss. The ones who were a PITA no matter
what distributed hell in regular doses.

Part of breaking in a new boss was to train him to get us the
stuff we needed, hold the shit umbrella over our heads, and
leave us alone for the rest of it. There was one guy who
only took 6 months to break in; the rest of them would take
a year...or never. The "never" ones didn't last or sought
promotion but in another cost center.

/BAH

Charles Richmond

2012-12-06 00:52:31 UTC

[snip...] [snip...] [snip...]
And how much hell did you catch in the meantime?

It depended on the boss. The ones who were a PITA no matter
what distributed hell in regular doses.
Part of breaking in a new boss was to train him to get us the
stuff we needed, hold the shit umbrella over our heads, and
leave us alone for the rest of it. There was one guy who
only took 6 months to break in; the rest of them would take
a year...or never. The "never" ones didn't last or sought
promotion but in another cost center.

It's like on the Leave It to Beaver TV show... when the dad wanted Beaver to
"rat" on a friend.

The dad said: "Beaver, if I saw a man rob a bank, I'd have to tell the
police."
Beaver said: "Yeah, dad. But you don't have to sit next to the bank robber
in school every day."

Things with training the managers work out in the long run. The problem
is... you *still* have to live through the short run. You suffer.

--

numerist at aquaporin4 dot com

jmfbahciv

2012-12-06 14:19:47 UTC