On the 370/165 and the 360/85

[John Savard]

As noted in my post "The Case of the Bashful Computer", I found that the
IBM System/360 Model 85 computer had the same type of double projection
console as was found on the IBM System/370 Model 165, thanks to an
advertisement at the time of introduction that appeared in the March
1968 _Datamation_.

In the book "IBM's 360 and Early 370 Systems", a copy of which I had the
incredible good fortune of purchasing in a thrift shop, it was noted
that "a cost-reduced version" of the 360/85 was the 370 that was
furthest ahead in design. Given the front panel similarity, I suspect
that this was what later became the 370/165, but the book doesn't say.

The book Microprogramming: Principles and Practices by Samir S. Husson
gives the microcode formats for the IBM System/360 Model 40 and Model
50. Documents on Al Kossow's web site give the microcode format for the
Model 30; this was also discussed in Bell and Newell, in an excerpt from
a paper on a microprogrammed implementation of EULER on a 360/30
reprinted there.

A table in the book by Husson gives the microcode word length for other
models of the 360 as well:

Model 20: 60 bit word...
with one 16-bit microinstruction and two 22-bit microinstructions; one
instruction is selected to execute from those three

Model 25: 16 bits
Model 30: 50 bits
Model 40: 56 bits
Model 50: 88 bits
Model 65: 100 bits
Model 85: 108 bits

In a web search, I have been able to find out that the 370/145 had a 32
bit long microinstruction.

Would anyone here happen to know if the 370/165 and 370/168 did, in
fact, have a 108-bit microinstruction word similar to that of the Model
85?

John Savard
http://www.quadibloc.com/index.html
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[John Savard]

Post by John Savard
Would anyone here happen to know if the 370/165 and 370/168 did, in
fact, have a 108-bit microinstruction word similar to that of the Model
85?

*If* the 370/165 was a faster version of the 360/85, then that makes it
a rather long-lived microarchitecture...

since, as I've learned from an item I came across in some further web
searches...

http://www.jfsowa.com/computer/memo125.htm

IBM took the 370/168, and implemented it in newer technologies, to
produce the IBM 3033 computer.

I knew the AS/400 evolved out of the FS project, but hadn't remembered
the details - that the System/38 was the predecessor of the AS/400.

It is interesting that the later IBM 3081 was *also* an FS outgrowth;
the high-end FS prototype performing so well when 'emulating' a 370 that
it became IBM's top-of-the-line 370.

John Savard
http://www.quadibloc.com/index.html
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[Anne & Lynn Wheeler]

Post by John Savard
IBM took the 370/168, and implemented it in newer technologies, to
produce the IBM 3033 computer.
I knew the AS/400 evolved out of the FS project, but hadn't remembered
the details - that the System/38 was the predecessor of the AS/400.
It is interesting that the later IBM 3081 was *also* an FS outgrowth;
the high-end FS prototype performing so well when 'emulating' a 370 that
it became IBM's top-of-the-line 370.

not exactly 360/85 info (which I have no direct info)

there is some folklore that the pok group did 165->168->3033->3090

and the kingston group did 155->158->3081

along the way there was the 3031 and 3032 (in addition to the 3033).

the 303x line was differentiated by the "channel director" ... the 158
had integrated channels with the machine engine shared between 370
microcode and channel microcode. for the 303x, they packaged the 158
engine w/o the 370 microcode ... just the integrated channel microcode
as the channel director. the 370/158 was then repackaged as the 3031
working with a channel director (i.e. effectively now a dual processor
with two engines ... however one with only the 370 microcode and one
with only the channel microcode). the 168 was repackaged as the 3032
to work with the channel director.

the 3033 started out as 168 wiring diagram mapped to denser and faster
chip technology ... but only using the same number of circuits per
chip as used in the 168 (meaning only about 20percent faster). because
of competition and other issues, there was some rework of the logic to
use some of the additional circuits per chip ... eventually the 3033
was 50percent faster than 168 (approx. 4.5mips instead of 3.0 mips).

part of the 3033 folklore was that it was an extremely hurryup project
after FS had been killed
http://www.garlic.com/~lynn/subtopic.html#futuresys

since so much corporate effort had been diverted to FS during that
period ... that there was very little in the 370 pipeline (i.e. FS
doctrine was that FS was going to completely replace 370).

the 3081 architecture code name was 811 for nov78 ... extending 370
architecture to 31bit virtual addressing (not that the 360/67
previously had both 24-bit and 32-bit virtual addressing) and misc
other features ... no FS features (the other stuff is pure rumor)
... just extending the 155/158 microcoded lineage to faster technology
(while 165/168 lineage was much more hardwired).

The FS folklore is that the final nail in the FS coffin was a study by
the houston science center that showed if FS architecture was
implemented on the fastest, currently available technology (370/195),
that 370/195 applications would have thruput of about 370/145
(somewhere around a factor of 20-30 times slowdown). optimized codes
would peak around 10mips on 195 ... a lot of more conventional stuff
ran around 5mips (no branch prediction or speculative execution,
branches just drained the pipeline ... except for special case of
looping within the pipeline buffer). 370/145 was in the .3mip to .5mip
range.

3081 was going to be a multiprocessor offering only. initial 3081D had
approx. two five mip engines. later 3081K had pair of approx. 7mip
engines (14mips aggregate). because of some operating systems not
having multiprocessor support (primarily TPF, the old airline control
program), they were eventually forced to ship a single processor 3083.
as an aside, prior to 3081, multiprocessors had been totally
independent systems that got lashed together ... but could be
separated and run as independent single processor complexes. they
differentiated3081 as being "dyadic" ... which it had two processors
... it couldn't be separated into two independent single processor
systems (although there was 3084 which was essnentially a pair of
3081s).

a recent posting including an old discussion about some of the differences
between the predominately microcode 3081 and the much more hardwired
3090 ("trout" in the following refers to 3090):
http://www.garlic.com/~lynn/2006j.html#27 virtual memory

misc. past postings mentioning 3083/tpf:
http://www.garlic.com/~lynn/99.html#103 IBM 9020 computers used by FAA (was Re: EPO stories (was: HELP IT'S HOT!!!!!))
http://www.garlic.com/~lynn/2000b.html#65 oddly portable machines
http://www.garlic.com/~lynn/2000d.html#9 4341 was "Is a VAX a mainframe?"
http://www.garlic.com/~lynn/2000f.html#69 TSS ancient history, was X86 ultimate CISC? designs)
http://www.garlic.com/~lynn/2001b.html#37 John Mashey's greatest hits
http://www.garlic.com/~lynn/2001c.html#13 LINUS for S/390
http://www.garlic.com/~lynn/2001j.html#17 I hate Compaq
http://www.garlic.com/~lynn/2002c.html#9 IBM Doesn't Make Small MP's Anymore
http://www.garlic.com/~lynn/2002i.html#83 HONE
http://www.garlic.com/~lynn/2002m.html#67 Tweaking old computers?
http://www.garlic.com/~lynn/2002o.html#28 TPF
http://www.garlic.com/~lynn/2002p.html#58 AMP vs SMP
http://www.garlic.com/~lynn/2003g.html#30 One Processor is bad?
http://www.garlic.com/~lynn/2003p.html#45 Saturation Design Point
http://www.garlic.com/~lynn/2004.html#7 Dyadic
http://www.garlic.com/~lynn/2004c.html#35 Computer-oriented license plates
http://www.garlic.com/~lynn/2004e.html#44 Infiniband - practicalities for small clusters
http://www.garlic.com/~lynn/2005.html#22 The Soul of Barb's New Machine (was Re: creat)
http://www.garlic.com/~lynn/2005j.html#16 Performance and Capacity Planning
http://www.garlic.com/~lynn/2005m.html#55 54 Processors?
http://www.garlic.com/~lynn/2005o.html#44 Intel engineer discusses their dual-core design
http://www.garlic.com/~lynn/2005s.html#7 Performance of zOS guest
http://www.garlic.com/~lynn/2005s.html#38 MVCIN instruction
http://www.garlic.com/~lynn/2006d.html#5 IBM 610 workstation computer
http://www.garlic.com/~lynn/2006l.html#30 One or two CPUs - the pros & cons
http://www.garlic.com/~lynn/2006m.html#32 Old Hashing Routine


misc. past postings mentioning 303x channel director:
http://www.garlic.com/~lynn/95.html#3 What is an IBM 137/148 ???
http://www.garlic.com/~lynn/97.html#20 Why Mainframes?
http://www.garlic.com/~lynn/2000c.html#69 Does the word "mainframe" still have a meaning?
http://www.garlic.com/~lynn/2000d.html#7 4341 was "Is a VAX a mainframe?"
http://www.garlic.com/~lynn/2000d.html#11 4341 was "Is a VAX a mainframe?"
http://www.garlic.com/~lynn/2000d.html#12 4341 was "Is a VAX a mainframe?"
http://www.garlic.com/~lynn/2000g.html#11 360/370 instruction cycle time
http://www.garlic.com/~lynn/2001b.html#69 Z/90, S/390, 370/ESA (slightly off topic)
http://www.garlic.com/~lynn/2001b.html#83 Z/90, S/390, 370/ESA (slightly off topic)
http://www.garlic.com/~lynn/2001j.html#3 YKYGOW...
http://www.garlic.com/~lynn/2002.html#36 a.f.c history checkup... (was What specifications will the standard year 2001 PC have?)
http://www.garlic.com/~lynn/2002d.html#7 IBM Mainframe at home
http://www.garlic.com/~lynn/2002p.html#59 AMP vs SMP
http://www.garlic.com/~lynn/2003.html#39 Flex Question
http://www.garlic.com/~lynn/2003g.html#22 303x, idals, dat, disk head settle, and other rambling folklore
http://www.garlic.com/~lynn/2004.html#9 Dyadic
http://www.garlic.com/~lynn/2004.html#10 Dyadic
http://www.garlic.com/~lynn/2004d.html#65 System/360 40 years old today
http://www.garlic.com/~lynn/2004g.html#50 Chained I/O's
http://www.garlic.com/~lynn/2004m.html#17 mainframe and microprocessor
http://www.garlic.com/~lynn/2004o.html#7 Integer types for 128-bit addressing
http://www.garlic.com/~lynn/2005b.html#26 CAS and LL/SC
http://www.garlic.com/~lynn/2005d.html#62 Misuse of word "microcode"
http://www.garlic.com/~lynn/2005h.html#40 Software for IBM 360/30
http://www.garlic.com/~lynn/2005p.html#1 Intel engineer discusses their dual-core design
http://www.garlic.com/~lynn/2005q.html#30 HASP/ASP JES/JES2/JES3
http://www.garlic.com/~lynn/2005s.html#22 MVCIN instruction

[KR Williams]

In article <***@lhwlinux.garlic.com>, ***@garlic.com
says...

Post by Anne & Lynn Wheeler

Post by John Savard
IBM took the 370/168, and implemented it in newer technologies, to
produce the IBM 3033 computer.
I knew the AS/400 evolved out of the FS project, but hadn't remembered
the details - that the System/38 was the predecessor of the AS/400.
It is interesting that the later IBM 3081 was *also* an FS outgrowth;
the high-end FS prototype performing so well when 'emulating' a 370 that
it became IBM's top-of-the-line 370.

not exactly 360/85 info (which I have no direct info)
there is some folklore that the pok group did 165->168->3033->3090

The folklore is pretty good. ;-) IIRC the /65 gets put on the front
of that

Post by Anne & Lynn Wheeler
and the kingston group did 155->158->3081

... and the /85 here. I can't remember where the /195 fit in. It
was before my time.

When I started in P'ok (just before FS was killed) we were using
the engineering models of the /85s for our EDA tools to develop the
3081 and later the 303x.

Post by Anne & Lynn Wheeler
along the way there was the 3031 and 3032 (in addition to the 3033).

<snip>

Post by Anne & Lynn Wheeler
part of the 3033 folklore was that it was an extremely hurryup project
after FS had been killed
http://www.garlic.com/~lynn/subtopic.html#futuresys

No, the 3081 was put in the plan after FS was killed. The 3081
hardware (LEMs->TCMs, Clark Boards, and all) had so many problems
the 303x was shoved in as a hurry up project to have *something* to
sell because the 3081 kept slipping.

<snip>

[James Dow Allen]

Post by Anne & Lynn Wheeler
there is some folklore that the pok group did 165->168->3033->3090
and the kingston group did 155->158->3081

And (I heard) 135 was done in England, 145 in Germany; is that right?

Post by Anne & Lynn Wheeler
the 3033 started out as 168 wiring diagram mapped to denser and faster
chip technology

IIRC, logic was also reorganized so that a card-cage had
one functional unit instead of bitslices of several units.

A company eventually bought by Nat Semi had built a 158-lookalike,
but, although the Rest of World also had faster chips available,
they were unsuccessful in building a 3033-lookalike that ran at 3033
speed.
This was due to longer interconnects, partly due to larger chip
packages, and partly due to the decision to use large circuit boards.
(IBM's smaller circuit boards take better advantage, in effect,
of third dimension.) My involvement was indirect, working for
add-on memory companies, and consulting for the lookalike
manufacturer.

A big difference between 158 and 168 families is that the latter
was more modularized so easier to modify. A webpage
http://tinyurl.com/2452h/bug22.htm
discusses an unusual 158 bug related to its complexity.

James Dow Allen

[KR Williams]

Post by James Dow Allen

Post by Anne & Lynn Wheeler
there is some folklore that the pok group did 165->168->3033->3090
and the kingston group did 155->158->3081

And (I heard) 135 was done in England, 145 in Germany; is that right?

England? Maybe (the /135 was before my time), but the low end was
normally done in Endicott. Middle processor in Germany and the
large in P'ok.

Post by James Dow Allen

Post by Anne & Lynn Wheeler
the 3033 started out as 168 wiring diagram mapped to denser and faster
chip technology

IIRC, logic was also reorganized so that a card-cage had
one functional unit instead of bitslices of several units.

This may have been another effect of using more (25 vs. 4) circuits
per chip.

Post by James Dow Allen
A company eventually bought by Nat Semi had built a 158-lookalike,
but, although the Rest of World also had faster chips available,
they were unsuccessful in building a 3033-lookalike that ran at 3033
speed.
This was due to longer interconnects, partly due to larger chip
packages, and partly due to the decision to use large circuit boards.
(IBM's smaller circuit boards take better advantage, in effect,
of third dimension.) My involvement was indirect, working for
add-on memory companies, and consulting for the lookalike
manufacturer.

Were they using TTL? ECL had the added advantage of "free"
transmission line termination on long wires.

Post by James Dow Allen
A big difference between 158 and 168 families is that the latter
was more modularized so easier to modify. A webpage
http://tinyurl.com/2452h/bug22.htm
discusses an unusual 158 bug related to its complexity.

[James Dow Allen]

Post by KR Williams

Post by James Dow Allen
A company eventually bought by Nat Semi had built a 158-lookalike,
but, although the Rest of World also had faster chips available,
they were unsuccessful in building a 3033-lookalike that ran at 3033
speed. ... due to longer interconnects, ...

Were they using TTL?

ECL. Unless I'm mistaken there was no other way to get
high speed at that time. "Mecl 10K" was used in mid 1970's
but for the project I mentioned the later faster series was used;
one chip manufacturer calling it "100K".

IBM used a 4.25 volt differential to operate its ECL, but the Rest of
the World needed 5.2 volts for all but simple Or/Nor gates.
This meant, when add-on people needed to modify an IBM
mainframe, an extra power supply was needed ... unless the
logic could be built from Or/Nor's. (And/Nand's had transistors
in series so needed the extra volt.)

Post by KR Williams
ECL had the added advantage of "free"
transmission line termination on long wires.

I don't understand this. We added 90 or 50 ohm resistors at the
ends of any lines longer than 12 inches or so (IBM's 370/145 used
90-ohm impedance wires, the 168 50-ohm impedance; I don't
remember why the difference.)

The Mecl parts lacked the current for *two* 50 ohm resistors,
so on an occasion where two long lines were driven, one
of our engineers showed us how to avoid signal "ringing"
by terminating a line with two diodes instead of a resistor.

James

[KR Williams]

Post by James Dow Allen

Post by KR Williams

Post by James Dow Allen
A company eventually bought by Nat Semi had built a 158-lookalike,
but, although the Rest of World also had faster chips available,
they were unsuccessful in building a 3033-lookalike that ran at 3033
speed. ... due to longer interconnects, ...

Were they using TTL?

ECL. Unless I'm mistaken there was no other way to get
high speed at that time. "Mecl 10K" was used in mid 1970's
but for the project I mentioned the later faster series was used;
one chip manufacturer calling it "100K".

Depends on what you mean by "high speed". The 158/168 weren't all
that high speed. Yes, I used MECL 10K and 100K (both from Motorola
and later Fairchild, IIRC) for clocks for the first LEM/TCM test
fixtures for the 3081.

Post by James Dow Allen
IBM used a 4.25 volt differential to operate its ECL, but the Rest of
the World needed 5.2 volts for all but simple Or/Nor gates.

Yes, IBM used +1.25 and -3V, which put the signal swing around
ground, so ground could be used as a reference. Motorla used a
-5.2V supply, so the signal was -.7V to -1.7V (or some such) with a
reference of -1.4. The around-ground signaling and ground as the
reference meant that they could get away with a lower signal swing
too (ground is less noisy than your power supply).

Post by James Dow Allen
This meant, when add-on people needed to modify an IBM
mainframe, an extra power supply was needed ... unless the
logic could be built from Or/Nor's. (And/Nand's had transistors
in series so needed the extra volt.)

Logic can *always* be built out of NORs. ;-)

Post by James Dow Allen

Post by KR Williams
ECL had the added advantage of "free"
transmission line termination on long wires.

I don't understand this. We added 90 or 50 ohm resistors at the
ends of any lines longer than 12 inches or so (IBM's 370/145 used
90-ohm impedance wires, the 168 50-ohm impedance; I don't
remember why the difference.)

Yes, I was referring to TTL, which is impossible to terminate
without special drivers. ECL simply uses a different pull down
resistor (impedance match rather than high impedance pull-down),
thus "free". When I used MECL stuff I generally used a "split" or
thevinin terminator because it was easier than a separate -1.7V
terminator supply (IIRC IBM's MST/HPCL used a -.7V termination
supply).

Post by James Dow Allen
The Mecl parts lacked the current for *two* 50 ohm resistors,
so on an occasion where two long lines were driven, one
of our engineers showed us how to avoid signal "ringing"
by terminating a line with two diodes instead of a resistor.

If it's a long line with only a single receiver (or receivers close
enough) at the end, a series resistor at the source works too.

[Doug Glading]

http://www-03.ibm.com/ibm/history/documents/pdf/emea.pdf

Model 135 developed at IBM Hurley Park, England

Doug

[John Byrns]

Post by John Savard
As noted in my post "The Case of the Bashful Computer", I found that the
IBM System/360 Model 85 computer had the same type of double projection
console as was found on the IBM System/370 Model 165, thanks to an
advertisement at the time of introduction that appeared in the March
1968 _Datamation_.
In the book "IBM's 360 and Early 370 Systems", a copy of which I had the
incredible good fortune of purchasing in a thrift shop, it was noted
that "a cost-reduced version" of the 360/85 was the 370 that was
furthest ahead in design. Given the front panel similarity, I suspect
that this was what later became the 370/165, but the book doesn't say.
The book Microprogramming: Principles and Practices by Samir S. Husson
gives the microcode formats for the IBM System/360 Model 40 and Model
50. Documents on Al Kossow's web site give the microcode format for the
Model 30; this was also discussed in Bell and Newell, in an excerpt from
a paper on a microprogrammed implementation of EULER on a 360/30
reprinted there.
A table in the book by Husson gives the microcode word length for other
Model 20: 60 bit word...
with one 16-bit microinstruction and two 22-bit microinstructions; one
instruction is selected to execute from those three

Thanks for adding another data point in my quest to figure out what the
hardware inside a 360/20 is that made it lower in cost than say a similar
sized model 30. Does anyone know anything about the hardware architecture
of the model 20, that would help fill in the blanks in the following
table, or correct any errors?

Main Memory size: 16k bytes

Main Memory cycle time: 7.2 usec.

Main Memory Access Width: ?

ALU width: ?

Number of microcode Memory Words: ?

microcode Memory Word cycle time: 0.625 usec. ?

microcode Memory Word width: 60 bits, 1-16 & 2-22 bit micro instructions


Regards,

John Byrns


Surf my web pages at, http://users.rcn.com/jbyrns/